From 9fc686ae1488a596d0bed561a750396911e71b01 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sun, 28 Feb 2016 23:24:46 -0800 Subject: [PATCH] WIP on priv spec v1.9 --- env | 2 +- isa/rv64mi/dirty.S | 4 +++- isa/rv64mi/ipi.S | 2 +- isa/rv64mi/mcsr.S | 8 +++++--- isa/rv64mi/timer.S | 4 ++-- isa/rv64si/csr.S | 17 ++++++----------- isa/rv64si/scall.S | 21 ++++++++++++--------- isa/rv64si/wfi.S | 4 +++- 8 files changed, 33 insertions(+), 29 deletions(-) diff --git a/env b/env index 566e47e..a6dae9f 160000 --- a/env +++ b/env @@ -1 +1 @@ -Subproject commit 566e47ecd223d4a84fd0b349f525f74f3657dfc7 +Subproject commit a6dae9f422fc86a6459d26b71672e1cb55a4fc22 diff --git a/isa/rv64mi/dirty.S b/isa/rv64mi/dirty.S index 2be4921..731d80d 100644 --- a/isa/rv64mi/dirty.S +++ b/isa/rv64mi/dirty.S @@ -15,9 +15,10 @@ RVTEST_CODE_BEGIN # Turn on VM with superpage identity mapping la a1, page_table_1 + srl a1, a1, RISCV_PGSHIFT csrw sptbr, a1 sfence.vm - li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_PRV1 & ~(MSTATUS_PRV1<<1)) * PRV_S) + li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_MPP & ~(MSTATUS_MPP<<1)) * PRV_S) csrs mstatus, a1 la a1, 1f csrw mepc, a1 @@ -32,6 +33,7 @@ RVTEST_CODE_BEGIN # Load new page table li TESTNUM, 3 la t0, page_table_2 + srl t0, t0, RISCV_PGSHIFT csrw sptbr, t0 sfence.vm diff --git a/isa/rv64mi/ipi.S b/isa/rv64mi/ipi.S index 8aca665..7178310 100644 --- a/isa/rv64mi/ipi.S +++ b/isa/rv64mi/ipi.S @@ -14,7 +14,7 @@ RVTEST_RV64M RVTEST_CODE_BEGIN # enable interrupts - csrs mstatus, MSTATUS_IE + csrs mstatus, MSTATUS_MIE csrs mie, MIP_MSIP # get a unique core id diff --git a/isa/rv64mi/mcsr.S b/isa/rv64mi/mcsr.S index c1e2cd3..8a451ca 100644 --- a/isa/rv64mi/mcsr.S +++ b/isa/rv64mi/mcsr.S @@ -14,13 +14,15 @@ RVTEST_RV64M RVTEST_CODE_BEGIN # Check that mcpuid reports RV64 - TEST_CASE(2, a0, 0x2, csrr a0, mcpuid; srl a0, a0, 62) + TEST_CASE(2, a0, 0x2, csrr a0, misa; srl a0, a0, 62) # Check that mhartid reports 0 TEST_CASE(3, a0, 0x0, csrr a0, mhartid) - # Check that mimpid reports UC Berkeley - TEST_CASE(4, a0, 0x1, csrr a0, mimpid; sll a0, a0, 48; srl a0, a0, 48) + # Check that reading mimpid, marchid, and mvendorid doesn't cause exceptions + csrr a0, mimpid + csrr a0, marchid + csrr a0, mvendorid # Check that mtvec reports DEFAULT_MTVEC TEST_CASE(5, a0, DEFAULT_MTVEC, csrr a0, mtvec) diff --git a/isa/rv64mi/timer.S b/isa/rv64mi/timer.S index b7cc633..4697793 100644 --- a/isa/rv64mi/timer.S +++ b/isa/rv64mi/timer.S @@ -24,7 +24,7 @@ RVTEST_CODE_BEGIN csrw mtimecmp, a0 li a0, MIP_MTIP csrs mie, a0 - csrs mstatus, MSTATUS_IE + csrs mstatus, MSTATUS_MIE # advance an LFSR until the timer has fired enough times li s0, 1023 @@ -64,7 +64,7 @@ mtvec_handler: bgez t0, fail sll t0, t0, 1 - addi t0, t0, -2*IRQ_TIMER + addi t0, t0, -2*IRQ_M_TIMER bnez t0, fail csrr t0, mtime diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S index d66b432..af0b756 100644 --- a/isa/rv64si/csr.S +++ b/isa/rv64si/csr.S @@ -19,12 +19,10 @@ RVTEST_CODE_BEGIN #define scause mcause #define sepc mepc #define stvec_handler mtvec_handler - #undef SSTATUS_PS - #define SSTATUS_PS MSTATUS_PRV1 + #undef SSTATUS_SPP + #define SSTATUS_SPP MSTATUS_MPP #endif - csrwi cyclew, 0 - csrwi sscratch, 3 TEST_CASE( 2, a0, 3, csrr a0, sscratch); TEST_CASE( 3, a1, 3, csrrci a1, sscratch, 1); @@ -39,7 +37,7 @@ RVTEST_CODE_BEGIN TEST_CASE(10, a0, 255, li a0, 255; csrrw a0, cycle, x0); # jump to user land - li t0, SSTATUS_PS + li t0, SSTATUS_SPP csrc sstatus, t0 la t0, 1f csrw sepc, t0 @@ -49,23 +47,20 @@ RVTEST_CODE_BEGIN # Make sure reading status in user mode causes an exception. TEST_CASE(11, a0, 255, li a0, 255; csrr a0, sstatus); - # Make sure rdcycle is legal in user mode. - TEST_CASE(12, x0, 0, rdcycle a0) - # Exit by doing a syscall. - TEST_CASE(13, x0, 1, scall) + TEST_CASE(12, x0, 1, scall) # We should only fall through to this if scall failed. TEST_PASSFAIL stvec_handler: - # Trapping on tests 10, 11, and 13 is usually good news. + # Trapping on tests 11 and 12 is usually good news. # Note that since the test didn't complete, TESTNUM is smaller by 1. li t0, 9 beq TESTNUM, t0, privileged li t0, 10 beq TESTNUM, t0, privileged - li t0, 12 + li t0, 11 beq TESTNUM, t0, syscall # Trapping on other tests is bad news. diff --git a/isa/rv64si/scall.S b/isa/rv64si/scall.S index 935b2dd..703de0b 100644 --- a/isa/rv64si/scall.S +++ b/isa/rv64si/scall.S @@ -19,26 +19,29 @@ RVTEST_CODE_BEGIN #define scause mcause #define sepc mepc #define stvec_handler mtvec_handler - #undef CAUSE_SUPERVISOR_ECALL - #define CAUSE_SUPERVISOR_ECALL CAUSE_MACHINE_ECALL + #undef SSTATUS_SPP + #define SSTATUS_SPP MSTATUS_MPP #endif li TESTNUM, 2 + + li t0, SSTATUS_SPP + csrc sstatus, t0 + la t0, 1f + csrw sepc, t0 + eret +1: + scall j fail - j pass - TEST_PASSFAIL stvec_handler: - li t1, CAUSE_SUPERVISOR_ECALL + li t1, CAUSE_USER_ECALL csrr t0, scause bne t0, t1, fail - csrr t0, sepc - addi t0, t0, 8 - csrw sepc, t0 - sret + j pass RVTEST_CODE_END diff --git a/isa/rv64si/wfi.S b/isa/rv64si/wfi.S index 956121a..4575f59 100644 --- a/isa/rv64si/wfi.S +++ b/isa/rv64si/wfi.S @@ -19,10 +19,12 @@ RVTEST_CODE_BEGIN #define sip mip #undef MIP_SSIP #define MIP_SSIP MIP_MSIP + #undef SSTATUS_SIE + #define SSTATUS_SIE MSTATUS_MIE #endif # Make sure wfi doesn't stall if an interrupt is pending - csrc sstatus, SSTATUS_IE + csrc sstatus, SSTATUS_SIE csrs sie, MIP_SSIP csrs sip, MIP_SSIP wfi -- 2.30.2