From 9fc9d5f1fb1eea47118c00ecad1352ec84fd3047 Mon Sep 17 00:00:00 2001 From: Andrew Zonenberg Date: Mon, 2 May 2016 20:29:39 -0700 Subject: [PATCH] Added comment to clarify GP_ABUF cell --- techlibs/greenpak4/cells_sim.v | 2 ++ 1 file changed, 2 insertions(+) diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index 04bce8771..7555a7ac8 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -17,6 +17,8 @@ module GP_ABUF(input wire IN, output wire OUT); assign OUT = IN; + //cannot simulate mixed signal IP + endmodule module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg OUT); -- 2.30.2