From 9ffece4a0866e049d3fa6d7a956b58c5306f69ad Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 12 Apr 2022 03:59:44 +0100 Subject: [PATCH] --- openpower/sv/cr_ops.mdwn | 8 -------- 1 file changed, 8 deletions(-) diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn index deb8e0ff1..f8a7a4a18 100644 --- a/openpower/sv/cr_ops.mdwn +++ b/openpower/sv/cr_ops.mdwn @@ -65,14 +65,6 @@ allows the decision to be made to store or not store the main result, and unfortunately for CR Ops the CR Field result *is* the main result. -A reminder that, just as with other SVP64 Modes, unlike v3.1 64 bit -Prefixing there are insufficient bits spare in the prefix to mark -the type. Therefore, the SVP64 Mode must be identified by first -decoding the suffix (the 32 bit scalar operation), and, once -the instruction is identified (cmpi, mfcr, crweird) -only then may the type of SVP64 Mode (normal, branch, LDST, CR 3-bit -or CR 5-bit) be decoded. - # Format SVP64 RM `MODE` (includes `ELWIDTH` bits) for CR-based operations: -- 2.30.2