From a0891eabca558b53b630ef5674d16c1c2112aaef Mon Sep 17 00:00:00 2001 From: Jose Maria Casanova Crespo Date: Sat, 9 Jun 2018 11:45:42 +0200 Subject: [PATCH] intel/fs: Use shuffle_from_32bit_read at VARYING_PULL_CONSTANT_LOAD shuffle_from_32bit_read can manage the shuffle/unshuffle needed for different 8/16/32/64 bit-sizes at VARYING PULL CONSTANT LOAD. To get the specific component the first_component parameter is used. In the case of the previous 16-bit shuffle, the shuffle operation was generating not needed MOVs where its results where never used. This behaviour passed unnoticed on SIMD16 because dead_code_eliminate pass removed the generated instructions but for SIMD8 they cound't be removed because of being partial writes. Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs.cpp | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index d836b268629..5c95e260aad 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -191,21 +191,8 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld, vec4_result, surf_index, vec4_offset); inst->size_written = 4 * vec4_result.component_size(inst->exec_size); - fs_reg dw = offset(vec4_result, bld, (const_offset & 0xf) / 4); - switch (type_sz(dst.type)) { - case 2: - shuffle_32bit_load_result_to_16bit_data(bld, dst, dw, 0, 1); - bld.MOV(dst, subscript(dw, dst.type, (const_offset / 2) & 1)); - break; - case 4: - bld.MOV(dst, retype(dw, dst.type)); - break; - case 8: - shuffle_32bit_load_result_to_64bit_data(bld, dst, dw, 1); - break; - default: - unreachable("Unsupported bit_size"); - } + shuffle_from_32bit_read(bld, dst, vec4_result, + (const_offset & 0xf) / type_sz(dst.type), 1); } /** -- 2.30.2