From a0cd843f4d76e778d03509bd3aa80a3880ab717f Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Mon, 30 May 2011 20:00:11 +0000 Subject: [PATCH] Handle misaligned TFmode load/store. gcc/ 2011-05-30 H.J. Lu PR target/49168 * config/i386/i386.md (*movtf_internal): Handle misaligned load/store. gcc/testsuite/ 2011-05-30 H.J. Lu PR target/49168 * gcc.target/i386/pr49168-1.c: New. From-SVN: r174451 --- gcc/ChangeLog | 6 ++++++ gcc/config/i386/i386.md | 19 ++++++++++++++++--- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr49168-1.c | 11 +++++++++++ 4 files changed, 38 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr49168-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5e9badfde86..45212c0dfe0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-05-30 H.J. Lu + + PR target/49168 + * config/i386/i386.md (*movtf_internal): Handle misaligned + load/store. + 2011-05-30 Jakub Jelinek * dwarf2out.c (modified_type_die, gen_reference_type_die): Use diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 89e11730faa..6d3ae803998 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2842,10 +2842,23 @@ { case 0: case 1: - if (get_attr_mode (insn) == MODE_V4SF) - return "%vmovaps\t{%1, %0|%0, %1}"; + /* Handle misaligned load/store since we don't have movmisaligntf + pattern. */ + if (misaligned_operand (operands[0], TFmode) + || misaligned_operand (operands[1], TFmode)) + { + if (get_attr_mode (insn) == MODE_V4SF) + return "%vmovups\t{%1, %0|%0, %1}"; + else + return "%vmovdqu\t{%1, %0|%0, %1}"; + } else - return "%vmovdqa\t{%1, %0|%0, %1}"; + { + if (get_attr_mode (insn) == MODE_V4SF) + return "%vmovaps\t{%1, %0|%0, %1}"; + else + return "%vmovdqa\t{%1, %0|%0, %1}"; + } case 2: return standard_sse_constant_opcode (insn, operands[1]); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e80c1b2c9b2..d8b0ef5446d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-05-30 H.J. Lu + + PR target/49168 + * gcc.target/i386/pr49168-1.c: New. + 2011-05-30 Jakub Jelinek Eric Botcazou diff --git a/gcc/testsuite/gcc.target/i386/pr49168-1.c b/gcc/testsuite/gcc.target/i386/pr49168-1.c new file mode 100644 index 00000000000..9676dc85a8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr49168-1.c @@ -0,0 +1,11 @@ +/* PR target/49168 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mtune=generic" } */ +/* { dg-final { scan-assembler-not "movdqa\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */ +/* { dg-final { scan-assembler "movdqu\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */ + +void +flt128_va (void *mem, __float128 d) +{ + __builtin_memcpy (mem, &d, sizeof (d)); +} -- 2.30.2