From a1c8ae97b7e1edbce91a71883be3253a5db06542 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 25 May 2021 11:21:08 +0100
Subject: [PATCH] add dump-out option to pypowersim

---
 src/openpower/decoder/isa/pypowersim.py | 46 +++++++++++++++++++++----
 src/test/basic_pypowersim/Makefile      |  5 ++-
 2 files changed, 44 insertions(+), 7 deletions(-)

diff --git a/src/openpower/decoder/isa/pypowersim.py b/src/openpower/decoder/isa/pypowersim.py
index 767344f2..e61e7d7f 100644
--- a/src/openpower/decoder/isa/pypowersim.py
+++ b/src/openpower/decoder/isa/pypowersim.py
@@ -25,6 +25,15 @@ def read_data(fname, offset=0):
             res[offset] = struct.unpack('<Q', b)[0] # unsigned long
             offset += 8
 
+def write_data(mem, fname, offset, sz):
+    """writes binary data to a file, each entry must be 8 bytes
+    """
+    with open(fname, "wb") as f:
+        for i in range(0, sz, 8):
+            addr = offset + i
+            val = mem.ld(addr, 8)
+            f.write(struct.pack('<Q', val)) # unsigned long
+
 
 def convert_to_num(num):
     # detect number types
@@ -144,7 +153,15 @@ def run_tst(args, generator, initial_regs,
 
 
 def help():
-    print ("TODO help")
+    print ("-i --binary=   raw (non-ELF) bare metal executable, loaded at 0x0")
+    print ("-l --listing=  file containing bare-metal assembler (no macros)")
+    print ("-g --intregs=  colon-separated file with GPR values")
+    print ("-f --fpregs=   colon-separated file with FPR values")
+    print ("-s --spregs=   colon-separated file with SPR values")
+    print ("-l --load=     filename:address to load binary into memory")
+    print ("-d --dump=     filename:address:len to binary save from memory")
+    print ("-h --help      prints this message")
+    print ("load and dump may be given multiple times")
     exit(-1)
 
 
@@ -156,19 +173,23 @@ def run_simulation():
     initial_sprs = None
     initial_mem = {}
     lst = None
+    write_to = []
 
     try:
-        opts, args = getopt.getopt(sys.argv[1:], "i:l:g:f:s:l:",
-                                   ["binary=", "listing=",
+        opts, args = getopt.getopt(sys.argv[1:], "hi:l:g:f:s:l:d:",
+                                   ["help",
+                                    "binary=", "listing=",
                                     "intregs=", "fpregs=", "sprs=",
-                                    "load="])
+                                    "load=", "dump="])
 
     except:
         sys.stderr.write("Command-line Error\n")
         help()
 
     for opt, arg in opts:
-        if opt in ['-i', '--binary']:
+        if opt in ['-h', '--help']:
+            help()
+        elif opt in ['-i', '--binary']:
             binaryname = arg
         elif opt in ['-l', '--listing']:
             lst = arg
@@ -184,10 +205,20 @@ def run_simulation():
                 fname, offs = arg[0], 0
             else:
                 fname, offs = arg
-            offs = int(offs)
+            offs = convert_to_num(offs)
             print ("offs load", fname, offs)
             mem = read_data(fname, offs)
             initial_mem.update(mem)
+        elif opt in ['-d', '--dump']:
+            arg = list(map(str.strip, arg.split(":")))
+            assert len(arg) == 3, \
+                   "dump '%s' must contain file:offset:length" % repr(arg)
+            fname, offs, length = arg
+            offs = convert_to_num(offs)
+            length = convert_to_num(length)
+            assert length % 8 == 0, "length %d must align on 8-byte" % length
+            print ("dump", fname, offs, length)
+            write_to.append((fname, offs, length))
 
     print (initial_mem)
 
@@ -219,6 +250,9 @@ def run_simulation():
         print ("Mem")
         simulator.mem.dump()
 
+        for fname, offs, length in write_to:
+            write_data(simulator.mem, fname, offs, length)
+
 
 if __name__ == "__main__":
     run_simulation()
diff --git a/src/test/basic_pypowersim/Makefile b/src/test/basic_pypowersim/Makefile
index b9ef925e..b2b5dd52 100644
--- a/src/test/basic_pypowersim/Makefile
+++ b/src/test/basic_pypowersim/Makefile
@@ -8,7 +8,10 @@ all: sim
 sim: kernel.bin
 	echo -n -e \\0060\\0000\\0061\\0000 > test.bin
 	echo -n -e \\0060\\0000\\0061\\0000 >> test.bin
-	pypowersim --load test.bin:0 -g gpr.list -i kernel.bin
+	pypowersim --load test.bin:0 \
+               --dump testout.bin:0x20000100:8 \
+               --dump testout2.bin:0x0:16 \
+               -g gpr.list -i kernel.bin
 
 clean:
 	rm *.o *.elf *.bin
-- 
2.30.2