From a1e814e79d92dff0e6ef388a4530877df6cfbd5c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 28 Dec 2020 20:50:32 +0000 Subject: [PATCH] add fp sv_analysis entries --- openpower/isatables/RM-1P-2S1D.csv | 8 ++++---- openpower/isatables/minor_63l.csv | 2 +- openpower/sv_analysis.py | 5 +++++ 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/openpower/isatables/RM-1P-2S1D.csv b/openpower/isatables/RM-1P-2S1D.csv index 8c3b2b49a..4932483f1 100644 --- a/openpower/isatables/RM-1P-2S1D.csv +++ b/openpower/isatables/RM-1P-2S1D.csv @@ -11,9 +11,9 @@ cmp,1P,EXTRA3,d:BF,s:RA,s:RB,0,RA,RB,0,0,0,BF cmpl,1P,EXTRA3,d:BF,s:RA,s:RB,0,RA,RB,0,0,0,BF cmprb,1P,EXTRA3,d:BF,s:RA,s:RB,0,RA,RB,0,0,0,BF cmpeqb,1P,EXTRA3,d:BF,s:RA,s:RB,0,RA,RB,0,0,0,BF -0/0=fcmpu,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,0,0,1 -1/0=fcmpo,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,0,0,1 -4/0=ftdiv,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,0,0,1 +0/0=fcmpu,1P,EXTRA3,d:BF,s:FRA,s:FRB,0,FRA,FRB,0,0,0,1 +1/0=fcmpo,1P,EXTRA3,d:BF,s:FRA,s:FRB,0,FRA,FRB,0,0,0,1 +4/0=ftdiv,1P,EXTRA3,d:BF,s:FRA,s:FRB,0,FRA,FRB,0,0,0,1 bpermd,1P,EXTRA3,d:RA,s:RS,s:RB,0,RS,RB,0,RA,0,0 modud,1P,EXTRA3,d:RT,s:RA,s:RB,0,RA,RB,0,RT,0,0 moduw,1P,EXTRA3,d:RT,s:RA,s:RB,0,RA,RB,0,RT,0,0 @@ -90,4 +90,4 @@ fadd,1P,EXTRA3,"d:FRT,d:CR1",s:FRA,s:FRB,0,FRA,FRB,0,FRT,0,CR1 fmul,1P,EXTRA3,"d:FRT,d:CR1",s:FRA,s:FRC,0,FRA,0,FRC,FRT,0,CR1 26/6=fmrgow,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,FRT,0,0 30/6=fmrgew,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,FRT,0,0 -0/8=fcpsgn,1P,EXTRA3,TODO,0,0,0,FRA,FRB,0,FRT,0,0 +0/8=fcpsgn,1P,EXTRA3,"d:FRT,d:CR1",s:FRA,s:FRB,0,FRA,FRB,0,FRT,0,CR1 diff --git a/openpower/isatables/minor_63l.csv b/openpower/isatables/minor_63l.csv index 3f106b4a6..4cd162442 100644 --- a/openpower/isatables/minor_63l.csv +++ b/openpower/isatables/minor_63l.csv @@ -11,7 +11,7 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou 0b011011110,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,30/6=fmrgew, 0b011110010,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,18/7=mffsfamily, 0b011110110,FPU,OP_FPOP_I,NONE,FRB,NONE,NONE,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,22/7=mtfsf, -0b100000000,FPU,OP_FPOP,FRA,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/8=fcpsgn, +0b100000000,FPU,OP_FPOP,FRA,FRB,NONE,FRT,0,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/8=fcpsgn, 0b100000001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,1/8=fneg, 0b100000010,FPU,OP_FPOP,NONE,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,2/8=fmr, 0b100000100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/8=fnabs, diff --git a/openpower/sv_analysis.py b/openpower/sv_analysis.py index 91061a4d0..e39f7a40c 100644 --- a/openpower/sv_analysis.py +++ b/openpower/sv_analysis.py @@ -463,6 +463,11 @@ def process_csvs(): res['0'] = 'd:FRT,d:CR1' # FRT,CR1: Rdest1_EXTRA3 res['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3 res['2'] = 's:FRC' # FRC: Rsrc1_EXTRA3 + # should be for fcmp + elif regs == ['FRA','FRB','','','0','1']: + res['0'] = 'd:BF' # BF: Rdest1_EXTRA3 + res['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3 + res['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3 elif regs == ['FRA','FRB','','FRT','0','CR1']: res['0'] = 'd:FRT,d:CR1' # FRT,CR1: Rdest1_EXTRA3 res['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3 -- 2.30.2