From a1f505d8745be840464beac64b57e9cff809bb0d Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 5 Aug 2021 11:37:50 +0100 Subject: [PATCH] add SVP64 Branch-Conditional equivalent of Rc fields --- openpower/isatables/fields.text | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/openpower/isatables/fields.text b/openpower/isatables/fields.text index f1ba11ef..8560c211 100644 --- a/openpower/isatables/fields.text +++ b/openpower/isatables/fields.text @@ -3,8 +3,9 @@ | PO | LI |AA|LK | #1.6.2 B-FORM - |0 |6 |11 |16 |30|31 | - | PO | BO| BI | BD |AA|LK | + |0 |6 |11 |16 |30 |31 | + | PO | BO| BI | BD |AA |LK | + | PO | BO| BI | BD |BRc|LK | #1.6.3 SC-FORM |0 |6 |11 |16 |20 |27 |30 |31 | @@ -105,9 +106,9 @@ | PO | RT | /// |L3 | /// | XO | / | # 1.6.8 XL-FORM - |0 |6 |9 |11 |14 |16 |19|20|21 |31 | + |0 |6 |9 |11 |14 |16|17 |19|20|21 |31 | | PO | BT | BA | BB | XO | / | - | PO | BO | BI | /// |BH | XO |LK | + | PO | BO | BI |Bc|// |BH | XO |LK | | PO | | /// |S | XO | / | | PO | BF |// |BFA |// | /// | XO | / | | PO | /// | XO | / | @@ -321,6 +322,9 @@ Field used to specify a bit in the CR to be used as a source. Formats: XL + Bc (16) + SVP64-only Branch-Conditional version of Rc for bclr + Formats: XL BC (21:25) Field used to specify a bit in the CR to be used as a source. @@ -363,6 +367,9 @@ tional instructions. The encoding is described in Section 2.4, 'Branch Instructions'. Formats: B, XL, X, XL + BRc (30) + SVP64-only Branch-Conditional version of Rc + Formats: B BT (6:10) Field used to specify a bit in the CR or in the FPSCR to be used as a target. -- 2.30.2