From a20930073f6de2f7a6e8f95cb7c9a8f23f49f1be Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 29 Nov 2020 16:30:17 +0000
Subject: [PATCH] add cr int predication page

---
 openpower/sv/cr_int_predication.mdwn | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 openpower/sv/cr_int_predication.mdwn

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
new file mode 100644
index 000000000..fee9ee973
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+++ b/openpower/sv/cr_int_predication.mdwn
@@ -0,0 +1,20 @@
+# New instructions for CR/INT predication
+
+See:
+
+* <https://bugs.libre-soc.org/show_bug.cgi?id=533>
+
+Basic concept:
+
+* CR-based instructions that perform simple AND/OR/XOR from all four bits
+  of a CR to create a single bit value (0/1) in an integer register
+* Inverse of the same, taking a single bit value (0/1) from an integer
+  register to selectively target all four bits of a given CR
+* Vectorisation of the same
+
+Purpose:
+
+* To provide a merged version of what is currently a multi-sequence of
+  CR operations (crand, cror, crxor) with mfcr and mtcrf
+* To provide a vectorised version of the same, suitable for advanced
+  predication
-- 
2.30.2