From a22030133d9bed4e4e93f549b7993705421be845 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 12 Oct 2018 05:03:38 -0700 Subject: [PATCH] arch: Explicitly specify the endianness in the generic mem helpers. This avoids using the accessors which automatically assume an endianness, requiring the memory system to know what the guest ISA is. Change-Id: I863fa4116f00e77b801a2f8ea2fbe34e7f55fd5f Reviewed-on: https://gem5-review.googlesource.com/c/13461 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- src/arch/generic/memhelpers.hh | 2 +- src/arch/generic/mmapped_ipr.cc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/arch/generic/memhelpers.hh b/src/arch/generic/memhelpers.hh index 6fe1707a0..7fd4f70de 100644 --- a/src/arch/generic/memhelpers.hh +++ b/src/arch/generic/memhelpers.hh @@ -66,7 +66,7 @@ template void getMem(PacketPtr pkt, MemT &mem, Trace::InstRecord *traceData) { - mem = pkt->get(); + mem = pkt->get(TheISA::GuestByteOrder); if (traceData) traceData->setData(mem); } diff --git a/src/arch/generic/mmapped_ipr.cc b/src/arch/generic/mmapped_ipr.cc index c908eff01..14e2bafbd 100644 --- a/src/arch/generic/mmapped_ipr.cc +++ b/src/arch/generic/mmapped_ipr.cc @@ -47,7 +47,7 @@ handlePseudoInst(ThreadContext *xc, Packet *pkt) assert((offset >> 16) == 0); ret = PseudoInst::pseudoInst(xc, func, subfunc); if (pkt->isRead()) - pkt->set(ret); + pkt->set(ret, TheISA::GuestByteOrder); } Cycles -- 2.30.2