From a23ddc7397e91fce1c75014af4bdf1ee2d4c328e Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Thu, 24 Sep 2020 19:34:28 -0300 Subject: [PATCH] Use nmutil simulator module to simplify choosing among engines --- src/soc/simple/test/test_issuer.py | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/soc/simple/test/test_issuer.py b/src/soc/simple/test/test_issuer.py index 6426d05b..edcfb4f7 100644 --- a/src/soc/simple/test/test_issuer.py +++ b/src/soc/simple/test/test_issuer.py @@ -5,10 +5,7 @@ related bugs: * https://bugs.libre-soc.org/show_bug.cgi?id=363 """ from nmigen import Module, Signal, Cat -if True: - from nmigen.back.pysim import Simulator, Delay, Settle -else: - from nmigen.sim.cxxsim import Simulator, Delay, Settle +from nmutil.sim_tmp_alternative import Simulator, Delay, Settle from nmutil.formaltest import FHDLTestCase from nmigen.cli import rtlil import unittest -- 2.30.2