From a288e202c5e50704968685fc2922d159335be2cb Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Mon, 13 Apr 2020 13:26:04 -0700 Subject: [PATCH] xtensa: fix PR target/94584 Patterns zero_extendhisi2, zero_extendqisi2 and extendhisi2_internal can load value from memory, but they don't treat volatile memory correctly. Add %v1 before load instructions to emit 'memw' instruction when -mserialize-volatile is in effect. 2020-04-14 Max Filippov gcc/ * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2) (extendhisi2_internal): Add %v1 before the load instructions. gcc/testsuite/ * gcc.target/xtensa/pr94584.c: New test. --- gcc/ChangeLog | 6 ++++++ gcc/config/xtensa/xtensa.md | 6 +++--- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/xtensa/pr94584.c | 24 +++++++++++++++++++++++ 4 files changed, 38 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/xtensa/pr94584.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e88c0e13d15..3c6a45e8fe7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2020-04-14 Max Filippov + + PR target/94584 + * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2) + (extendhisi2_internal): Add %v1 before the load instructions. + 2020-04-14 Aaron Sawdey PR target/94542 diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 5b803d3cbe6..749fe477d56 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -538,7 +538,7 @@ "" "@ extui\t%0, %1, 0, 16 - l16ui\t%0, %1" + %v1l16ui\t%0, %1" [(set_attr "type" "arith,load") (set_attr "mode" "SI") (set_attr "length" "3,3")]) @@ -549,7 +549,7 @@ "" "@ extui\t%0, %1, 0, 8 - l8ui\t%0, %1" + %v1l8ui\t%0, %1" [(set_attr "type" "arith,load") (set_attr "mode" "SI") (set_attr "length" "3,3")]) @@ -575,7 +575,7 @@ "" "@ sext\t%0, %1, 15 - l16si\t%0, %1" + %v1l16si\t%0, %1" [(set_attr "type" "arith,load") (set_attr "mode" "SI") (set_attr "length" "3,3")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3a3a1c59465..69f9b93cd49 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-04-13 Max Filippov + + PR target/94584 + * gcc.target/xtensa/pr94584.c: New test. + 2020-04-14 Iain Sandoe PR c++/94359 diff --git a/gcc/testsuite/gcc.target/xtensa/pr94584.c b/gcc/testsuite/gcc.target/xtensa/pr94584.c new file mode 100644 index 00000000000..1577285b8a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/xtensa/pr94584.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mserialize-volatile" } */ + +unsigned long load32 (volatile unsigned long *s) +{ + return *s; +} + +short load16s (volatile short *s) +{ + return *s; +} + +unsigned short load16u (volatile unsigned short *s) +{ + return *s; +} + +unsigned char load8 (volatile unsigned char *s) +{ + return *s; +} + +/* { dg-final { scan-assembler-times "memw" 4 } } */ -- 2.30.2