From a2a71c567ad7c335a5a7dbd02065c0dcae989f09 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 8 Sep 2022 18:09:03 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 7c40905df..3661dd2a5 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -200,7 +200,7 @@ Note critically that: then Vectorise because this creates the situation of Prefixed-Prefixed, resulting in deep complexity in Hardware Decode at a critical juncture, as well as introducing 96-bit instructions. -* **All* of these Scalar instructions are candidates for Vectorisation. +* **All** of these Scalar instructions are candidates for Vectorisation. Thus none of them may be 64-bit-Scalar-only. *Three 75% allocations are thus genuinely needed*, all other options are unsuitable -- 2.30.2