From a33293e38b42ef0c8ef9f932a2721dfd5b95a622 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 6 Jul 2016 03:25:04 -0700 Subject: [PATCH] Update to new PTE format --- env | 2 +- isa/rv64mi/dirty.S | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/env b/env index 260b6ff..5c613fe 160000 --- a/env +++ b/env @@ -1 +1 @@ -Subproject commit 260b6fff32036dcfc8299aa21dd7cd443b18bb6a +Subproject commit 5c613fe43d1bc44e6ae408b5356c7d60d93a1ca0 diff --git a/isa/rv64mi/dirty.S b/isa/rv64mi/dirty.S index 9de358b..66ed5a0 100644 --- a/isa/rv64mi/dirty.S +++ b/isa/rv64mi/dirty.S @@ -44,7 +44,7 @@ RVTEST_CODE_BEGIN # Make sure R and D bits are set lw t0, page_table_2 - li t1, PTE_R | PTE_D + li t1, PTE_A | PTE_D and t0, t0, t1 bne t0, t1, die @@ -58,7 +58,7 @@ stvec_handler: bne TESTNUM, t1, 1f # Make sure R bit is set lw t0, page_table_1 - li t1, PTE_R + li t1, PTE_A and t0, t0, t1 bne t0, t1, die @@ -84,9 +84,9 @@ RVTEST_DATA_BEGIN TEST_DATA .align 12 -page_table_1: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_URX_SRX +page_table_1: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_X dummy: .dword 0 .align 12 -page_table_2: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_URWX_SRWX +page_table_2: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_X | PTE_W RVTEST_DATA_END -- 2.30.2