From a35c33c89637d2a56d1bef6df2f54e1e27328d2a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 29 Jun 2019 22:06:58 +0100 Subject: [PATCH] correct link --- simple_v_extension/vblock_format.mdwn | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/simple_v_extension/vblock_format.mdwn b/simple_v_extension/vblock_format.mdwn index 49b005cbe..98fa2bb34 100644 --- a/simple_v_extension/vblock_format.mdwn +++ b/simple_v_extension/vblock_format.mdwn @@ -29,8 +29,8 @@ Note: The VL Block format is similar to that used in [[sv_prefix_proposal]]. * Mode 0b00: set VL to the immediate, truncated to not exceed MVL. Register rd is also set to the same value, if not x0. -* Mode 0b01: follow [[sv.setvl]] rules except with RVC style registers - in the range x8-x15 for rs1 and rd. +* Mode 0b01: follow [[specification/sv.setvl]] rules, with RVC + style registers in the range x8-x15 for rs1 and rd. * Mode 0b10: set both MVL and VL to the immediate. Register rd is also set if not x0. * Mode 0b11: reserved. All fields must be zero. -- 2.30.2