From a3b3345ae62503982698171bcfce0afe23bd8a31 Mon Sep 17 00:00:00 2001 From: Tamar Christina Date: Tue, 19 Dec 2017 12:04:13 +0000 Subject: [PATCH] Add support for V_4B so we can properly reject it. Previously parse_vector_type_for_operand was changed to allow the use of 4b register size for indexed lane instructions. However this had the unintended side effect of also allowing 4b for normal vector registers. Because this support was only partial the rest of the tool silently treated 4b as 8b and continued. This patch adds full support for 4b so it can be properly distinguished from 8b and the correct errors are generated. With this patch you still can't encode any instruction which actually requires v.4b but such instructions don't exist so to prevent needing a workaround in get_vreg_qualifier_from_value this was just omitted. gas/ PR gas/22529 * config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_V_4B. * gas/testsuite/gas/aarch64/pr22529.s: New. * gas/testsuite/gas/aarch64/pr22529.d: New. * gas/testsuite/gas/aarch64/pr22529.l: New. include/ PR gas/22529 * opcode/aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_V_4B. opcodes/ PR gas/22529 * aarch64-opc.c (aarch64_opnd_qualifiers): Add 4b variant. --- gas/ChangeLog | 8 ++++++++ gas/config/tc-aarch64.c | 6 +++--- gas/testsuite/gas/aarch64/pr22529.d | 4 ++++ gas/testsuite/gas/aarch64/pr22529.l | 17 +++++++++++++++++ gas/testsuite/gas/aarch64/pr22529.s | 3 +++ include/ChangeLog | 5 +++++ include/opcode/aarch64.h | 1 + opcodes/ChangeLog | 5 +++++ opcodes/aarch64-opc.c | 1 + 9 files changed, 47 insertions(+), 3 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/pr22529.d create mode 100644 gas/testsuite/gas/aarch64/pr22529.l create mode 100644 gas/testsuite/gas/aarch64/pr22529.s diff --git a/gas/ChangeLog b/gas/ChangeLog index ed794be6761..608d39bd269 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2017-12-19 Tamar Christina + + PR 22529 + * config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_V_4B. + * gas/testsuite/gas/aarch64/pr22529.s: New. + * gas/testsuite/gas/aarch64/pr22529.d: New. + * gas/testsuite/gas/aarch64/pr22529.l: New. + 2017-12-18 Nick Clifton PR 22493 diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 832f4e808ac..6b5179ee571 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -4911,7 +4911,7 @@ vectype_to_qualifier (const struct vector_type_el *vectype) = {1, 2, 4, 8, 16}; const unsigned int ele_base [5] = { - AARCH64_OPND_QLF_V_8B, + AARCH64_OPND_QLF_V_4B, AARCH64_OPND_QLF_V_2H, AARCH64_OPND_QLF_V_2S, AARCH64_OPND_QLF_V_1D, @@ -4946,7 +4946,7 @@ vectype_to_qualifier (const struct vector_type_el *vectype) a vector-type dependent amount. */ shift = 0; if (vectype->type == NT_b) - shift = 4; + shift = 3; else if (vectype->type == NT_h || vectype->type == NT_s) shift = 2; else if (vectype->type >= NT_d) @@ -4955,7 +4955,7 @@ vectype_to_qualifier (const struct vector_type_el *vectype) gas_assert (0); offset = ele_base [vectype->type] + (vectype->width >> shift); - gas_assert (AARCH64_OPND_QLF_V_8B <= offset + gas_assert (AARCH64_OPND_QLF_V_4B <= offset && offset <= AARCH64_OPND_QLF_V_1Q); return offset; } diff --git a/gas/testsuite/gas/aarch64/pr22529.d b/gas/testsuite/gas/aarch64/pr22529.d new file mode 100644 index 00000000000..1fd0d85d83c --- /dev/null +++ b/gas/testsuite/gas/aarch64/pr22529.d @@ -0,0 +1,4 @@ +#as: -march=armv8.4-a +#source: pr22529.s +#error-output: pr22529.l + diff --git a/gas/testsuite/gas/aarch64/pr22529.l b/gas/testsuite/gas/aarch64/pr22529.l new file mode 100644 index 00000000000..646e00a1956 --- /dev/null +++ b/gas/testsuite/gas/aarch64/pr22529.l @@ -0,0 +1,17 @@ +[^:]*: Assembler messages: +[^:]*:1: Error: operand mismatch -- `udot v0\.2s,v1\.8b,v2\.4b' +[^:]*:1: Info: did you mean this\? +[^:]*:1: Info: udot v0\.2s, v1\.8b, v2\.8b +[^:]*:1: Info: other valid variant\(s\): +[^:]*:1: Info: udot v0\.4s, v1\.16b, v2\.16b +[^:]*:2: Error: operand mismatch -- `udot v0\.2s,v1\.4b,v2\.8b' +[^:]*:2: Info: did you mean this\? +[^:]*:2: Info: udot v0\.2s, v1\.8b, v2\.8b +[^:]*:2: Info: other valid variant\(s\): +[^:]*:2: Info: udot v0\.4s, v1\.16b, v2\.16b +[^:]*:3: Error: operand mismatch -- `udot v0\.2s,v1\.4b,v2\.4b' +[^:]*:3: Info: did you mean this\? +[^:]*:3: Info: udot v0\.2s, v1\.8b, v2\.8b +[^:]*:3: Info: other valid variant\(s\): +[^:]*:3: Info: udot v0\.4s, v1\.16b, v2\.16b + diff --git a/gas/testsuite/gas/aarch64/pr22529.s b/gas/testsuite/gas/aarch64/pr22529.s new file mode 100644 index 00000000000..f87b897e987 --- /dev/null +++ b/gas/testsuite/gas/aarch64/pr22529.s @@ -0,0 +1,3 @@ +udot v0.2s, v1.8b, v2.4b +udot v0.2s, v1.4b, v2.8b +udot v0.2s, v1.4b, v2.4b diff --git a/include/ChangeLog b/include/ChangeLog index 8914e269ff1..ecfd766af92 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2017-12-19 Tamar Christina + + PR gas/22529 + * opcode/aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_V_4B. + 2017-12-11 Stephen Crane * plugin-api.h: Add new plugin hook to allow processing of input diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 73ebd804222..453b1771f02 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -403,6 +403,7 @@ enum aarch64_opnd_qualifier a use is only for the ease of operand encoding/decoding and qualifier sequence matching; such a use should not be applied widely; use the value constraint qualifiers for immediate operands wherever possible. */ + AARCH64_OPND_QLF_V_4B, AARCH64_OPND_QLF_V_8B, AARCH64_OPND_QLF_V_16B, AARCH64_OPND_QLF_V_2H, diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 1aa9af42b19..a8b8dba5be3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2017-12-19 Tamar Christina + + PR gas/22529 + * aarch64-opc.c (aarch64_opnd_qualifiers): Add 4b variant. + 2017-12-18 Jan Beulich * i386-gen.c (operand_type_init): Delete OPERAND_TYPE_REGYMM and diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 96ca085d15b..eac02795537 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -699,6 +699,7 @@ struct operand_qualifier_data aarch64_opnd_qualifiers[] = {8, 1, 0x3, "d", OQK_OPD_VARIANT}, {16, 1, 0x4, "q", OQK_OPD_VARIANT}, + {1, 4, 0x0, "4b", OQK_OPD_VARIANT}, {1, 8, 0x0, "8b", OQK_OPD_VARIANT}, {1, 16, 0x1, "16b", OQK_OPD_VARIANT}, {2, 2, 0x0, "2h", OQK_OPD_VARIANT}, -- 2.30.2