From a3e489cc2adc2b49df9f7ad29099ec7c6de9c990 Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 4 Jun 2021 01:41:20 +0100 Subject: [PATCH] --- openpower/sv/int_fp_mv.mdwn | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 120bd30e6..8e86c8f10 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -159,7 +159,10 @@ Rc=1 tests RT and sets CR0 `fmvfg FRT, RA` -move a 64-bit float from a GPR to a FPR, just copying bits. +move a 64-bit float from a GPR to a FPR, just copying bits. No exceptions +are raised, no flags are altered of any kind. + +TODO: Rc=1 variants? `fmvfgs FRT, RA` @@ -169,6 +172,8 @@ move a 32-bit float from a GPR to a FPR, just copying bits. Converts the TODO: Rc=1 variants? +TODO: clear statement on evaluation as to whethrer exceptions or flags raised as part of the **FP** conversion (not the int bitcopy part, the converdion part. the semantics should really be the same as frsp) + ### Float load immediate (kinda a variant of `fmvfg`) `fmvis FRT, FI` -- 2.30.2