From a3e48cfabff16242fdcdfab7ae7886186de44bf7 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 26 Sep 2023 11:41:22 +0100
Subject: [PATCH] Added english language description, spaces and brackets for
 lwa instruction

---
 openpower/isa/fixedload.mdwn | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 06299114..dd3174ce 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -425,6 +425,13 @@ Pseudo-code:
     EA <- b + EXTS(DS || 0b00)
     RT <- EXTS(MEM(EA, 4))
 
+Description:
+
+    Let the effective address (EA) be the sum
+    (RA|0)+ (DS||0b00). The word in storage addressed by
+    EA is loaded into RT[32:63] . RT[0:31] are filled with a copy
+    of bit 0 of the loaded word.
+
 Special Registers Altered:
 
     None
-- 
2.30.2