From a4069fc8634c6fc2aaaf05070cbac2a7f8631c1b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 28 Sep 2019 00:41:28 +0200 Subject: [PATCH] add SERV submodule --- .gitmodules | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.gitmodules b/.gitmodules index 17eaf734..8587dd82 100644 --- a/.gitmodules +++ b/.gitmodules @@ -22,3 +22,6 @@ [submodule "litex/soc/cores/cpu/rocket/verilog"] path = litex/soc/cores/cpu/rocket/verilog url = https://github.com/enjoy-digital/rocket-litex-verilog +[submodule "litex/soc/cores/cpu/serv/verilog"] + path = litex/soc/cores/cpu/serv/verilog + url = https://github.com/olofk/serv -- 2.30.2