From a42dc974010828ab5ae98d49b69a1d3f420321ea Mon Sep 17 00:00:00 2001 From: =?utf8?q?J=C4=99drzej=20Boczar?= Date: Thu, 21 May 2020 14:09:46 +0200 Subject: [PATCH] bios/sdram: add BIOS command for reading SPD --- litex/soc/software/bios/cmds/cmd_litedram.c | 53 +++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/litex/soc/software/bios/cmds/cmd_litedram.c b/litex/soc/software/bios/cmds/cmd_litedram.c index 0b9ea228..1fcce272 100644 --- a/litex/soc/software/bios/cmds/cmd_litedram.c +++ b/litex/soc/software/bios/cmds/cmd_litedram.c @@ -221,3 +221,56 @@ define_command(sdrlevel, sdrlevel, "Perform read/write leveling", LITEDRAM_CMDS) #ifdef CSR_SDRAM_BASE define_command(memtest, memtest, "Run a memory test", LITEDRAM_CMDS); #endif + + +/** + * Command "spdread" + * + * Read contents of SPD EEPROM memory. + * SPD address is defined by the pins A0, A1, A2. + * + */ +#ifdef CSR_I2C_BASE +static void spdread_handler(int nb_params, char **params) +{ + unsigned char buf[256]; + unsigned int spdaddr; + int length = sizeof(buf); + char *c; + + if (nb_params < 1) { + printf("spdread []"); + return; + } + + spdaddr = strtoul(params[0], &c, 0); + if (*c != 0) { + printf("Incorrect address"); + return; + } + if (spdaddr > 0b111) { + printf("SPD EEPROM max address is 0b111 (defined by A0, A1, A2 pins)"); + return; + } + + if (nb_params > 1) { + length = strtoul(params[1], &c, 0); + if (*c != 0) { + printf("Incorrect address"); + return; + } + if (length > sizeof(buf)) { + printf("Max length is %d", sizeof(buf)); + return; + } + } + + if (!spdread(spdaddr, 0, buf, length)) { + printf("Error when reading SPD EEPROM"); + return; + } + + dump_bytes((unsigned int *) buf, length, 0); +} +define_command(spdread, spdread_handler, "Read SPD EEPROM", LITEDRAM_CMDS); +#endif -- 2.30.2