From a451882123524de1b9b175af97a1cdd32e5f25c1 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 2 Aug 2018 10:48:42 +0000 Subject: [PATCH] [AArch64] Add support for 16-bit FMOV immediates aarch64_float_const_representable_p was still returning false for HFmode, so we wouldn't use 16-bit FMOV immediate. E.g. before the patch: __fp16 foo (void) { return 0x1.1p-3; } gave: mov w0, 12352 fmov h0, w0 with -march=armv8.2-a+fp16, whereas now it gives: fmov h0, 1.328125e-1 2018-08-02 Richard Sandiford gcc/ * config/aarch64/aarch64.c (aarch64_float_const_representable_p): Allow HFmode constants if TARGET_FP_F16INST. gcc/testsuite/ * gcc.target/aarch64/f16_mov_immediate_1.c: Expect fmov immediate to be used. * gcc.target/aarch64/f16_mov_immediate_2.c: Likewise. * gcc.target/aarch64/f16_mov_immediate_3.c: Force +nofp16. * gcc.target/aarch64/sve/single_1.c: Except fmov immediate to be used for .h. * gcc.target/aarch64/sve/single_2.c: Likewise. * gcc.target/aarch64/sve/single_3.c: Likewise. * gcc.target/aarch64/sve/single_4.c: Likewise. From-SVN: r263250 --- gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.c | 4 ++-- gcc/testsuite/ChangeLog | 12 ++++++++++++ .../gcc.target/aarch64/f16_mov_immediate_1.c | 6 +++--- .../gcc.target/aarch64/f16_mov_immediate_2.c | 4 +--- .../gcc.target/aarch64/f16_mov_immediate_3.c | 2 ++ gcc/testsuite/gcc.target/aarch64/sve/single_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_4.c | 2 +- 10 files changed, 29 insertions(+), 12 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5a5b7570a0d..3f22b090cea 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-08-02 Richard Sandiford + + * config/aarch64/aarch64.c (aarch64_float_const_representable_p): + Allow HFmode constants if TARGET_FP_F16INST. + 2018-08-02 Jackson Woodruff PR target/86014 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 014f9f64066..1e86d6e68f0 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -14969,8 +14969,8 @@ aarch64_float_const_representable_p (rtx x) if (!CONST_DOUBLE_P (x)) return false; - /* We don't support HFmode constants yet. */ - if (GET_MODE (x) == VOIDmode || GET_MODE (x) == HFmode) + if (GET_MODE (x) == VOIDmode + || (GET_MODE (x) == HFmode && !TARGET_FP_F16INST)) return false; r = *CONST_DOUBLE_REAL_VALUE (x); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0b5eba797fa..b5a46b47353 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2018-08-02 Richard Sandiford + + * gcc.target/aarch64/f16_mov_immediate_1.c: Expect fmov immediate + to be used. + * gcc.target/aarch64/f16_mov_immediate_2.c: Likewise. + * gcc.target/aarch64/f16_mov_immediate_3.c: Force +nofp16. + * gcc.target/aarch64/sve/single_1.c: Except fmov immediate to be used + for .h. + * gcc.target/aarch64/sve/single_2.c: Likewise. + * gcc.target/aarch64/sve/single_3.c: Likewise. + * gcc.target/aarch64/sve/single_4.c: Likewise. + 2018-08-02 Jackson Woodruff PR target/86014 diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c index 3d22d225851..4411ecfed0b 100644 --- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c +++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c @@ -44,6 +44,6 @@ __fp16 f5 () return a; } -/* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, #?19520" 3 } } */ -/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0xbc, lsl 8" 1 } } */ -/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x4c, lsl 8" 1 } } */ +/* { dg-final { scan-assembler-times {fmov\th[0-9]+, #?1\.7e\+1} 3 } } */ +/* { dg-final { scan-assembler-times {fmov\th[0-9]+, #?-1\.0e\+0} 1 } } */ +/* { dg-final { scan-assembler-times {fmov\th[0-9]+, #?1\.6e\+1} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c index 81ebd581fb2..53c43240a36 100644 --- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c +++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c @@ -40,6 +40,4 @@ float16_t f3(void) /* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x5c, lsl 8" 1 } } */ /* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x7c, lsl 8" 1 } } */ -/* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, 19520" 1 } } */ -/* { dg-final { scan-assembler-times "fmov\th\[0-9\], w\[0-9\]+" 1 } } */ - +/* { dg-final { scan-assembler-times {fmov\th[0-9]+, #?1.7e\+1} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_3.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_3.c index 66218e3eaac..63d950a8694 100644 --- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_3.c +++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_3.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ +#pragma GCC target "+nofp16" + __fp16 f4 () { __fp16 a = 0.1; diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_1.c b/gcc/testsuite/gcc.target/aarch64/sve/single_1.c index a5dd5ebfaed..11b88aef7cc 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_1.c @@ -36,7 +36,7 @@ TEST_LOOP (double, 3.0) /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, #6\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #7\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #8\n} 1 } } */ -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, #15360\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.h, #1\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.s, #2\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.d, #3\.0e\+0\n} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_2.c b/gcc/testsuite/gcc.target/aarch64/sve/single_2.c index 1ef72b62e0a..1fbf4892c81 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_2.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, #6\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #7\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #8\n} 1 } } */ -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, #15360\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.h, #1\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.s, #2\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.d, #3\.0e\+0\n} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_3.c b/gcc/testsuite/gcc.target/aarch64/sve/single_3.c index fefbfbf393e..a3688b692a1 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_3.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, #6\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #7\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #8\n} 1 } } */ -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, #15360\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.h, #1\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.s, #2\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.d, #3\.0e\+0\n} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_4.c b/gcc/testsuite/gcc.target/aarch64/sve/single_4.c index c1b1af611a9..08965d39ffd 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_4.c @@ -12,7 +12,7 @@ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, #6\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #7\n} 1 } } */ /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, #8\n} 1 } } */ -/* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, #15360\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.h, #1\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.s, #2\.0e\+0\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfmov\tz[0-9]+\.d, #3\.0e\+0\n} 1 } } */ -- 2.30.2