From a4b5f46a8713709efd152482c5b795c40d02178e Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 19 Dec 2020 17:19:02 +0000 Subject: [PATCH] --- openpower/sv/svp_rewrite/svp64.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn index 60f834077..e88b05079 100644 --- a/openpower/sv/svp_rewrite/svp64.mdwn +++ b/openpower/sv/svp_rewrite/svp64.mdwn @@ -449,7 +449,7 @@ so FP instructions with Rc=1 write to CR[1] aka SVCR1_000. CRs are not stored in SPRs: they are registers in their own right. Theregore context-switching the full set of CRs involves a Vectorised -mfcr or mtcr, using VL=64, elwidth=8 to do so. +mfcr or mtcr, using VL=64, elwidth=8 to do so. This is exactly as how scalar OpenPOWER context-switches CRs: it is just that there are now more of them. The 64 SV CRs are arranged similarly to the way the 128 integer registers are arranged. TODO a python program that auto-generates a CSV file -- 2.30.2