From a5c668518ad05d040735af48c4c1b28938c44997 Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Thu, 9 Jul 2020 14:59:04 -0400 Subject: [PATCH] freedreno/regs: update a6xx GRAS registers Update some registers in the 0x8000-0x87ff range. Signed-off-by: Jonathan Marek Part-of: --- src/freedreno/registers/a6xx.xml | 223 ++++++++++-------- src/freedreno/vulkan/tu_clear_blit.c | 26 +- src/freedreno/vulkan/tu_cmd_buffer.c | 4 +- src/freedreno/vulkan/tu_pipeline.c | 34 +-- .../drivers/freedreno/a6xx/fd6_blitter.c | 27 +-- src/gallium/drivers/freedreno/a6xx/fd6_draw.c | 10 +- src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 20 +- src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 4 +- 8 files changed, 188 insertions(+), 160 deletions(-) diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index 96415c17f6d..b9a92cdc325 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -1592,19 +1592,6 @@ to upconvert to 32b float internally? - - - - - - - - - - - - - @@ -1805,14 +1792,6 @@ to upconvert to 32b float internally? - - - - - - - - + + + + + + @@ -1914,6 +1899,7 @@ to upconvert to 32b float internally? + @@ -1921,16 +1907,7 @@ to upconvert to 32b float internally? - - - - - - - - - - + @@ -1944,24 +1921,28 @@ to upconvert to 32b float internally? mode, and frag_face --> + - - - - - - - - - - - - - + + + + + + + + + + + + + + + + @@ -1969,15 +1950,16 @@ to upconvert to 32b float internally? + - + - - + + @@ -1987,22 +1969,35 @@ to upconvert to 32b float internally? + - - + + + - - + + + + + + + + + + + + + @@ -2010,6 +2005,7 @@ to upconvert to 32b float internally? + @@ -2027,16 +2023,25 @@ to upconvert to 32b float internally? + + - - + + + + + + + + + + + + - - - - - - + + + + - + - + - - + + + - - + + + + + + + - + + + + + - - - - - - + + + + + + + - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - + diff --git a/src/freedreno/vulkan/tu_clear_blit.c b/src/freedreno/vulkan/tu_clear_blit.c index 2be3e38dccc..2bc30bcf993 100644 --- a/src/freedreno/vulkan/tu_clear_blit.c +++ b/src/freedreno/vulkan/tu_clear_blit.c @@ -107,10 +107,10 @@ r2d_coords(struct tu_cs *cs, return; tu_cs_emit_regs(cs, - A6XX_GRAS_2D_SRC_TL_X(.x = src->x), - A6XX_GRAS_2D_SRC_BR_X(.x = src->x + extent->width - 1), - A6XX_GRAS_2D_SRC_TL_Y(.y = src->y), - A6XX_GRAS_2D_SRC_BR_Y(.y = src->y + extent->height - 1)); + A6XX_GRAS_2D_SRC_TL_X(src->x), + A6XX_GRAS_2D_SRC_BR_X(src->x + extent->width - 1), + A6XX_GRAS_2D_SRC_TL_Y(src->y), + A6XX_GRAS_2D_SRC_BR_Y(src->y + extent->height - 1)); } static void @@ -468,11 +468,11 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit, uint32_t num_ tu_cs_emit_regs(cs, A6XX_GRAS_SU_CNTL()); // XXX msaa enable? tu_cs_emit_regs(cs, - A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0(.x = 0, .y = 0), - A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0(.x = 0x7fff, .y = 0x7fff)); + A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(0, .x = 0, .y = 0), + A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR(0, .x = 0x7fff, .y = 0x7fff)); tu_cs_emit_regs(cs, - A6XX_GRAS_SC_SCREEN_SCISSOR_TL_0(.x = 0, .y = 0), - A6XX_GRAS_SC_SCREEN_SCISSOR_BR_0(.x = 0x7fff, .y = 0x7fff)); + A6XX_GRAS_SC_SCREEN_SCISSOR_TL(0, .x = 0, .y = 0), + A6XX_GRAS_SC_SCREEN_SCISSOR_BR(0, .x = 0x7fff, .y = 0x7fff)); tu_cs_emit_regs(cs, A6XX_VFD_INDEX_OFFSET(), @@ -719,7 +719,7 @@ r3d_setup(struct tu_cmd_buffer *cmd, { if (!cmd->state.pass) { tu_emit_cache_flush_ccu(cmd, cs, TU_CMD_CCU_SYSMEM); - tu6_emit_window_scissor(cs, 0, 0, 0x7fff, 0x7fff); + tu6_emit_window_scissor(cs, 0, 0, 0x3fff, 0x3fff); } tu_cs_emit_regs(cs, A6XX_GRAS_BIN_CONTROL(.dword = 0xc00000)); @@ -1001,10 +1001,10 @@ tu6_blit_image(struct tu_cmd_buffer *cmd, A6XX_GRAS_2D_DST_BR(.x = MAX2(info->dstOffsets[0].x, info->dstOffsets[1].x) - 1, .y = MAX2(info->dstOffsets[0].y, info->dstOffsets[1].y) - 1)); tu_cs_emit_regs(cs, - A6XX_GRAS_2D_SRC_TL_X(.x = MIN2(info->srcOffsets[0].x, info->srcOffsets[1].x)), - A6XX_GRAS_2D_SRC_BR_X(.x = MAX2(info->srcOffsets[0].x, info->srcOffsets[1].x) - 1), - A6XX_GRAS_2D_SRC_TL_Y(.y = MIN2(info->srcOffsets[0].y, info->srcOffsets[1].y)), - A6XX_GRAS_2D_SRC_BR_Y(.y = MAX2(info->srcOffsets[0].y, info->srcOffsets[1].y) - 1)); + A6XX_GRAS_2D_SRC_TL_X(MIN2(info->srcOffsets[0].x, info->srcOffsets[1].x)), + A6XX_GRAS_2D_SRC_BR_X(MAX2(info->srcOffsets[0].x, info->srcOffsets[1].x) - 1), + A6XX_GRAS_2D_SRC_TL_Y(MIN2(info->srcOffsets[0].y, info->srcOffsets[1].y)), + A6XX_GRAS_2D_SRC_BR_Y(MAX2(info->srcOffsets[0].y, info->srcOffsets[1].y) - 1)); } struct tu_image_view dst, src; diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c index 141f599f147..cbfc7dcebcc 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.c +++ b/src/freedreno/vulkan/tu_cmd_buffer.c @@ -458,8 +458,8 @@ tu6_emit_window_scissor(struct tu_cs *cs, A6XX_GRAS_SC_WINDOW_SCISSOR_BR(.x = x2, .y = y2)); tu_cs_emit_regs(cs, - A6XX_GRAS_RESOLVE_CNTL_1(.x = x1, .y = y1), - A6XX_GRAS_RESOLVE_CNTL_2(.x = x2, .y = y2)); + A6XX_GRAS_2D_RESOLVE_CNTL_1(.x = x1, .y = y1), + A6XX_GRAS_2D_RESOLVE_CNTL_2(.x = x2, .y = y2)); } void diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c index 549e90bc3ac..d0734653f09 100644 --- a/src/freedreno/vulkan/tu_pipeline.c +++ b/src/freedreno/vulkan/tu_pipeline.c @@ -1539,19 +1539,19 @@ tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport) guardband_adj.width = tu6_guardband_adj(max.x - min.x); guardband_adj.height = tu6_guardband_adj(max.y - min.y); - tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_CL_VPORT_XOFFSET_0, 6); - tu_cs_emit(cs, A6XX_GRAS_CL_VPORT_XOFFSET_0(offsets[0]).value); - tu_cs_emit(cs, A6XX_GRAS_CL_VPORT_XSCALE_0(scales[0]).value); - tu_cs_emit(cs, A6XX_GRAS_CL_VPORT_YOFFSET_0(offsets[1]).value); - tu_cs_emit(cs, A6XX_GRAS_CL_VPORT_YSCALE_0(scales[1]).value); - tu_cs_emit(cs, A6XX_GRAS_CL_VPORT_ZOFFSET_0(offsets[2]).value); - tu_cs_emit(cs, A6XX_GRAS_CL_VPORT_ZSCALE_0(scales[2]).value); - - tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0, 2); - tu_cs_emit(cs, A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(min.x) | - A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(min.y)); - tu_cs_emit(cs, A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(max.x - 1) | - A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(max.y - 1)); + tu_cs_emit_regs(cs, + A6XX_GRAS_CL_VPORT_XOFFSET(0, offsets[0]), + A6XX_GRAS_CL_VPORT_XSCALE(0, scales[0]), + A6XX_GRAS_CL_VPORT_YOFFSET(0, offsets[1]), + A6XX_GRAS_CL_VPORT_YSCALE(0, scales[1]), + A6XX_GRAS_CL_VPORT_ZOFFSET(0, offsets[2]), + A6XX_GRAS_CL_VPORT_ZSCALE(0, scales[2])); + + tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(0), 2); + tu_cs_emit(cs, A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_X(min.x) | + A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_Y(min.y)); + tu_cs_emit(cs, A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_X(max.x - 1) | + A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_Y(max.y - 1)); tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_CL_GUARDBAND_CLIP_ADJ, 1); tu_cs_emit(cs, @@ -1562,8 +1562,8 @@ tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport) float z_clamp_max = MAX2(viewport->minDepth, viewport->maxDepth); tu_cs_emit_regs(cs, - A6XX_GRAS_CL_Z_CLAMP_MIN(z_clamp_min), - A6XX_GRAS_CL_Z_CLAMP_MAX(z_clamp_max)); + A6XX_GRAS_CL_Z_CLAMP_MIN(0, z_clamp_min), + A6XX_GRAS_CL_Z_CLAMP_MAX(0, z_clamp_max)); tu_cs_emit_regs(cs, A6XX_RB_Z_CLAMP_MIN(z_clamp_min), @@ -1595,8 +1595,8 @@ tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor) max.y = MIN2(scissor_max, max.y); tu_cs_emit_regs(cs, - A6XX_GRAS_SC_SCREEN_SCISSOR_TL_0(.x = min.x, .y = min.y), - A6XX_GRAS_SC_SCREEN_SCISSOR_BR_0(.x = max.x - 1, .y = max.y - 1)); + A6XX_GRAS_SC_SCREEN_SCISSOR_TL(0, .x = min.x, .y = min.y), + A6XX_GRAS_SC_SCREEN_SCISSOR_BR(0, .x = max.x - 1, .y = max.y - 1)); } void diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c index e711ff6e274..2c50b9f06fa 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c @@ -37,7 +37,6 @@ #include "fd6_format.h" #include "fd6_emit.h" #include "fd6_resource.h" -#include "fd6_pack.h" static inline enum a6xx_2d_ifmt fd6_ifmt(enum a6xx_format fmt) @@ -396,10 +395,10 @@ emit_blit_buffer(struct fd_context *ctx, struct fd_ringbuffer *ring, * Blit command: */ OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4); - OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X(sshift)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X(sshift + w - 1)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y(0)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y(0)); OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2); OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0)); @@ -541,10 +540,10 @@ emit_blit_texture(struct fd_context *ctx, sy2 = sbox->y + sbox->height - 1; OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4); - OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X(sx1)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X(sx2)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y(sy1)); + OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y(sy2)); dx1 = dbox->x * nr_samples; dy1 = dbox->y; @@ -556,11 +555,11 @@ emit_blit_texture(struct fd_context *ctx, OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2)); if (info->scissor_enable) { - OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2); - OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) | - A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny)); - OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) | - A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1)); + OUT_PKT4(ring, REG_A6XX_GRAS_2D_RESOLVE_CNTL_1, 2); + OUT_RING(ring, A6XX_GRAS_2D_RESOLVE_CNTL_1_X(info->scissor.minx) | + A6XX_GRAS_2D_RESOLVE_CNTL_1_Y(info->scissor.miny)); + OUT_RING(ring, A6XX_GRAS_2D_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) | + A6XX_GRAS_2D_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1)); } emit_blit_setup(ring, info->dst.format, info->scissor_enable, NULL); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c index ab8fdea19de..507b1e51bd9 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c @@ -425,11 +425,11 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth) OUT_RING(ring, 0x00000000); OUT_RING(ring, 0x00000000); - OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4); - OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(0)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(0)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0)); - OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0)); + OUT_REG(ring, + A6XX_GRAS_2D_SRC_TL_X(0), + A6XX_GRAS_2D_SRC_BR_X(0), + A6XX_GRAS_2D_SRC_TL_Y(0), + A6XX_GRAS_2D_SRC_BR_Y(0)); OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2); OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(0) | diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index cf224178ca8..09085b6adf4 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -860,11 +860,11 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit) struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); OUT_REG(ring, - A6XX_GRAS_SC_SCREEN_SCISSOR_TL_0( + A6XX_GRAS_SC_SCREEN_SCISSOR_TL(0, .x = scissor->minx, .y = scissor->miny ), - A6XX_GRAS_SC_SCREEN_SCISSOR_BR_0( + A6XX_GRAS_SC_SCREEN_SCISSOR_BR(0, .x = MAX2(scissor->maxx, 1) - 1, .y = MAX2(scissor->maxy, 1) - 1 ) @@ -882,20 +882,20 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit) struct pipe_scissor_state *scissor = &ctx->viewport_scissor; OUT_REG(ring, - A6XX_GRAS_CL_VPORT_XOFFSET_0(ctx->viewport.translate[0]), - A6XX_GRAS_CL_VPORT_XSCALE_0(ctx->viewport.scale[0]), - A6XX_GRAS_CL_VPORT_YOFFSET_0(ctx->viewport.translate[1]), - A6XX_GRAS_CL_VPORT_YSCALE_0(ctx->viewport.scale[1]), - A6XX_GRAS_CL_VPORT_ZOFFSET_0(ctx->viewport.translate[2]), - A6XX_GRAS_CL_VPORT_ZSCALE_0(ctx->viewport.scale[2]) + A6XX_GRAS_CL_VPORT_XOFFSET(0, ctx->viewport.translate[0]), + A6XX_GRAS_CL_VPORT_XSCALE(0, ctx->viewport.scale[0]), + A6XX_GRAS_CL_VPORT_YOFFSET(0, ctx->viewport.translate[1]), + A6XX_GRAS_CL_VPORT_YSCALE(0, ctx->viewport.scale[1]), + A6XX_GRAS_CL_VPORT_ZOFFSET(0, ctx->viewport.translate[2]), + A6XX_GRAS_CL_VPORT_ZSCALE(0, ctx->viewport.scale[2]) ); OUT_REG(ring, - A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0( + A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(0, .x = scissor->minx, .y = scissor->miny ), - A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0( + A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR(0, .x = MAX2(scissor->maxx, 1) - 1, .y = MAX2(scissor->maxy, 1) - 1 ) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index c43d26b985f..8e7ba94a05b 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -539,8 +539,8 @@ set_scissor(struct fd_ringbuffer *ring, uint32_t x1, uint32_t y1, uint32_t x2, u A6XX_GRAS_SC_WINDOW_SCISSOR_BR(.x = x2, .y = y2)); OUT_REG(ring, - A6XX_GRAS_RESOLVE_CNTL_1(.x = x1, .y = y1), - A6XX_GRAS_RESOLVE_CNTL_2(.x = x2, .y = y2)); + A6XX_GRAS_2D_RESOLVE_CNTL_1(.x = x1, .y = y1), + A6XX_GRAS_2D_RESOLVE_CNTL_2(.x = x2, .y = y2)); } static void -- 2.30.2