From a5d2eb6b98c87e58f158c0426dd180bc4aab53a0 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 6 Feb 2014 07:21:41 -0800 Subject: [PATCH] i965: Program 3DSTATE_HIER_DEPTH_BUFFER properly on Broadwell. HiZ buffers still don't exist, but when they do, we'll set them up. Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/gen8_depth_state.c | 25 +++++++++++++------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index 8d36f6e5013..2c64e5951ce 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -119,14 +119,23 @@ gen8_emit_depth_stencil_hiz(struct brw_context *brw, OUT_BATCH(depth_mt ? depth_mt->qpitch >> 2 : 0); ADVANCE_BATCH(); - assert(!hiz); /* TODO: Implement HiZ. */ - BEGIN_BATCH(5); - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); + if (!hiz) { + BEGIN_BATCH(5); + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + } else { + BEGIN_BATCH(5); + OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2)); + OUT_BATCH(depth_mt->hiz_mt->region->pitch - 1); + OUT_RELOC64(depth_mt->hiz_mt->region->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(depth_mt->hiz_mt->qpitch >> 2); + ADVANCE_BATCH(); + } if (stencil_mt == NULL) { BEGIN_BATCH(5); -- 2.30.2