From a623724a53c606efa04a3bf0f9da7418953f1128 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 8 Dec 2021 20:04:45 +0000 Subject: [PATCH] check that no exception occurs in the virtual-memory-instruction-fetch --- src/soc/experiment/test/test_loadstore1.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/soc/experiment/test/test_loadstore1.py b/src/soc/experiment/test/test_loadstore1.py index fc909b7c..ebc4e584 100644 --- a/src/soc/experiment/test/test_loadstore1.py +++ b/src/soc/experiment/test/test_loadstore1.py @@ -8,7 +8,8 @@ from random import randint, seed from nmigen.sim import Simulator, Delay, Settle from nmutil.util import wrap -from soc.config.test.test_pi2ls import pi_ld, pi_st, pi_ldst, wait_busy +from soc.config.test.test_pi2ls import (pi_ld, pi_st, pi_ldst, wait_busy, + get_exception_info) #from soc.config.test.test_pi2ls import pi_st_debug from soc.config.test.test_loadstore import TestMemPspec from soc.config.loadstore import ConfigMemoryPortInterface @@ -191,9 +192,11 @@ def _test_loadstore1_ifetch(dut, mem): yield ldst.instr_fault.eq(0) while True: done = yield (ldst.done) - if done: + exc_info = yield from get_exception_info(pi.exc_o) + if done or exc_info.happened: break yield + assert exc_info.happened == 0 # assert just before doing the fault set zero yield ldst.instr_fault.eq(0) yield yield -- 2.30.2