From a62839128d8a73b95d725dc284383745ea6c5936 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 26 Oct 2018 04:16:12 +0100 Subject: [PATCH] add to_elwidth function, not complete: needs to use source elwidths --- riscv/sv.cc | 12 ++++++++++++ riscv/sv_reg.h | 1 + 2 files changed, 13 insertions(+) diff --git a/riscv/sv.cc b/riscv/sv.cc index 955cf46..0012649 100644 --- a/riscv/sv.cc +++ b/riscv/sv.cc @@ -12,6 +12,18 @@ int get_bitwidth(uint8_t elwidth, int xlen) } } +/* +int to_elwidth(uint8_t bitwidth, int xlen) +{ + switch (bitwidth) { + case xlen: return 0; + case 8: return 1; + case 16: return 2; + default: return 3; + } +} +*/ + sv_insn_t::sv_insn_t(processor_t *pr, bool _sv_enabled, insn_bits_t bits, unsigned int f, int _xlen, uint64_t &p_rd, uint64_t &p_rs1, uint64_t &p_rs2, uint64_t &p_rs3, diff --git a/riscv/sv_reg.h b/riscv/sv_reg.h index 08fa686..6908189 100644 --- a/riscv/sv_reg.h +++ b/riscv/sv_reg.h @@ -7,6 +7,7 @@ #define zext_bwid(x,wid) (((reg_t)(x) << (64-wid)) >> (64-wid)) extern int get_bitwidth(uint8_t elwidth, int xlen); +//extern int to_elwidth(uint8_t bitwidth, int xlen); class sv_sreg_t; -- 2.30.2