From a69cd0c2ec26228c33ec32e143b2728da6579eea Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 19 Oct 2021 22:06:33 +0100 Subject: [PATCH] --- SEP-210803722-Libre-SOC-8-core.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/SEP-210803722-Libre-SOC-8-core.mdwn b/SEP-210803722-Libre-SOC-8-core.mdwn index 507b03dd6..c2ad95a93 100644 --- a/SEP-210803722-Libre-SOC-8-core.mdwn +++ b/SEP-210803722-Libre-SOC-8-core.mdwn @@ -64,7 +64,8 @@ SVP64 contains features and capabilities never seen in any Instruction Set Architecture (ISA) of the past sixty years. With NLnet's help we have TRL (3) implementations and simulations demonstrating a 75% reduction in the program size of core algorithms for Video and Audio DSP Processing -(FFT, DCT, Matrix Multiply), and these still need optimized, which if +(FFT, DCT, Matrix Multiply), and these still have room for optimisation, +which if successfully expanded to general-purpose algorithms would result in huge power savings if deployed in mass-volume end-user products. -- 2.30.2