From a6c24e68b9c0bde0587b9fbf2a50aa09c58c207c Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Wed, 3 Sep 2008 14:02:30 +0000 Subject: [PATCH] * config/tc-i386.c (pe_lcomm_internal): New function. Allows the alignment field of the .lcomm directive to be optional. (pe_lcomm): New function. Pass pe_lcomm_internal to s_comm_internal. (md_pseudo_table): Implement .lcomm directive for COFF based targets. * doc/c-i386.texi (i386-Directives): New node. Used to document the .lcomm directive. --- gas/ChangeLog | 11 +++++++++++ gas/config/tc-i386.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ gas/doc/c-i386.texi | 26 ++++++++++++++++++++++++++ 3 files changed, 81 insertions(+) diff --git a/gas/ChangeLog b/gas/ChangeLog index eb7b93b29fa..fd0861a4eae 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,14 @@ +2008-09-03 Nick Clifton + + * config/tc-i386.c (pe_lcomm_internal): New function. Allows the + alignment field of the .lcomm directive to be optional. + (pe_lcomm): New function. Pass pe_lcomm_internal to + s_comm_internal. + (md_pseudo_table): Implement .lcomm directive for COFF based + targets. + * doc/c-i386.texi (i386-Directives): New node. Used to document + the .lcomm directive. + 2008-08-30 John David Anglin * config/tc-hppa.h: Don't define DWARF2_EH_FRAME_READ_ONLY on Linux diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 86ef49c3796..7744b16f513 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -684,6 +684,48 @@ static const arch_entry cpu_arch[] = CPU_SSE5_FLAGS }, }; +/* Like s_lcomm_internal in gas/read.c but the alignment string + is allowed to be optional. */ + +static symbolS * +pe_lcomm_internal (int needs_align, symbolS *symbolP, addressT size) +{ + addressT align = 0; + + SKIP_WHITESPACE (); + + if (needs_align + && *input_line_pointer == ',') + { + align = parse_align (needs_align - 1); + + if (align == (addressT) -1) + return NULL; + } + else + { + if (size >= 8) + align = 3; + else if (size >= 4) + align = 2; + else if (size >= 2) + align = 1; + else + align = 0; + } + + bss_alloc (symbolP, size, align); + return symbolP; +} + +void pe_lcomm (int); + +void +pe_lcomm (int needs_align) +{ + s_comm_internal (needs_align * 2, pe_lcomm_internal); +} + const pseudo_typeS md_pseudo_table[] = { #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO) @@ -694,6 +736,8 @@ const pseudo_typeS md_pseudo_table[] = {"arch", set_cpu_arch, 0}, #ifndef I386COFF {"bss", s_bss, 0}, +#else + {"lcomm", pe_lcomm, 1}, #endif {"ffloat", float_cons, 'f'}, {"dfloat", float_cons, 'd'}, diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 55cab7e594d..731bda2d72d 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -23,6 +23,7 @@ extending the Intel architecture to 64-bits. @menu * i386-Options:: Options +* i386-Directives:: X86 specific directives * i386-Syntax:: AT&T Syntax versus Intel Syntax * i386-Mnemonics:: Instruction Naming * i386-Regs:: Register Naming @@ -193,6 +194,31 @@ The @code{.att_syntax} and @code{.intel_syntax} directives will take precedent. @end table +@node i386-Directives +@section x86 specific Directives + +@cindex machine directives, x86 +@cindex x86 machine directives +@table @code + +@cindex @code{lcomm} directive, COFF +@item .lcomm @var{symbol} , @var{length}[, @var{alignment}] +Reserve @var{length} (an absolute expression) bytes for a local common +denoted by @var{symbol}. The section and value of @var{symbol} are +those of the new local common. The addresses are allocated in the bss +section, so that at run-time the bytes start off zeroed. @var{Symbol} +is not declared global (@pxref{Global,,@code{.global}}), so is normally +not visible to @code{@value{LD}}. The optional third parameter, +@var{alignment}, specifies the desired alignment of the symbol in the +bss section. + +This directive is only available for COFF based x86 targets. + +@c FIXME: Document other x86 specific directives ? Eg: .code16gcc, +@c .largecomm + +@end table + @node i386-Syntax @section AT&T Syntax versus Intel Syntax -- 2.30.2