From a7132e56662594aa97192998b4d52811b00cae79 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 25 May 2020 22:50:06 +0100 Subject: [PATCH] --- 3d_gpu/architecture/compunit.mdwn | 2 ++ 1 file changed, 2 insertions(+) diff --git a/3d_gpu/architecture/compunit.mdwn b/3d_gpu/architecture/compunit.mdwn index 32cf65bc9..b14020b16 100644 --- a/3d_gpu/architecture/compunit.mdwn +++ b/3d_gpu/architecture/compunit.mdwn @@ -65,6 +65,8 @@ Note that the read and write latches are held synchronously for one cycle, i.e. that when Go_Read comes in, one cycle is given in which the incoming register (broadcast over a Regfile Read Port) may have time to be latched. +It is REQUIRED that Issue be held valid only for one cycle. + It is REQUIRED that Go_Read be held valid only for one cycle, and it is REQUIRED that the corresponding Read_Req be dropped exactly one cycle after Go_Read is asserted HI. -- 2.30.2