From a7b0014d1a809268e55483ccc2c66674847f4a6e Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 4 Aug 2017 17:06:24 +0200 Subject: [PATCH] radeonsi: add and use si_pm4_state_enabled_and_changed MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Tested-by: Dieter Nützel Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_cp_dma.c | 20 +++++++++---------- src/gallium/drivers/radeonsi/si_state.h | 3 +++ .../drivers/radeonsi/si_state_shaders.c | 12 +++++------ 3 files changed, 18 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index 9f0e506282b..24fa6fd0870 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -442,26 +442,24 @@ void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf static void cik_prefetch_shader_async(struct si_context *sctx, struct si_pm4_state *state) { - if (state) { - struct pipe_resource *bo = &state->bo[0]->b.b; - assert(state->nbo == 1); + struct pipe_resource *bo = &state->bo[0]->b.b; + assert(state->nbo == 1); - cik_prefetch_TC_L2_async(sctx, bo, 0, bo->width0); - } + cik_prefetch_TC_L2_async(sctx, bo, 0, bo->width0); } void cik_emit_prefetch_L2(struct si_context *sctx) { /* Prefetch shaders and VBO descriptors to TC L2. */ - if (si_pm4_state_changed(sctx, ls)) + if (si_pm4_state_enabled_and_changed(sctx, ls)) cik_prefetch_shader_async(sctx, sctx->queued.named.ls); - if (si_pm4_state_changed(sctx, hs)) + if (si_pm4_state_enabled_and_changed(sctx, hs)) cik_prefetch_shader_async(sctx, sctx->queued.named.hs); - if (si_pm4_state_changed(sctx, es)) + if (si_pm4_state_enabled_and_changed(sctx, es)) cik_prefetch_shader_async(sctx, sctx->queued.named.es); - if (si_pm4_state_changed(sctx, gs)) + if (si_pm4_state_enabled_and_changed(sctx, gs)) cik_prefetch_shader_async(sctx, sctx->queued.named.gs); - if (si_pm4_state_changed(sctx, vs)) + if (si_pm4_state_enabled_and_changed(sctx, vs)) cik_prefetch_shader_async(sctx, sctx->queued.named.vs); /* Vertex buffer descriptors are uploaded uncached, so prefetch @@ -471,7 +469,7 @@ void cik_emit_prefetch_L2(struct si_context *sctx) sctx->vertex_buffers.buffer_offset, sctx->vertex_elements->desc_list_byte_size); } - if (si_pm4_state_changed(sctx, ps)) + if (si_pm4_state_enabled_and_changed(sctx, ps)) cik_prefetch_shader_async(sctx, sctx->queued.named.ps); sctx->prefetch_L2 = false; diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 9fbede702a7..48e88afe1b8 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -288,6 +288,9 @@ struct si_buffer_resources { #define si_pm4_state_changed(sctx, member) \ ((sctx)->queued.named.member != (sctx)->emitted.named.member) +#define si_pm4_state_enabled_and_changed(sctx, member) \ + ((sctx)->queued.named.member && si_pm4_state_changed(sctx, member)) + #define si_pm4_bind_state(sctx, member, value) \ do { \ (sctx)->queued.named.member = (value); \ diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 0dd64025d48..cb5a23e9c80 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -3297,12 +3297,12 @@ bool si_update_shaders(struct si_context *sctx) } } - if (si_pm4_state_changed(sctx, ls) || - si_pm4_state_changed(sctx, hs) || - si_pm4_state_changed(sctx, es) || - si_pm4_state_changed(sctx, gs) || - si_pm4_state_changed(sctx, vs) || - si_pm4_state_changed(sctx, ps)) { + if (si_pm4_state_enabled_and_changed(sctx, ls) || + si_pm4_state_enabled_and_changed(sctx, hs) || + si_pm4_state_enabled_and_changed(sctx, es) || + si_pm4_state_enabled_and_changed(sctx, gs) || + si_pm4_state_enabled_and_changed(sctx, vs) || + si_pm4_state_enabled_and_changed(sctx, ps)) { if (!si_update_spi_tmpring_size(sctx)) return false; } -- 2.30.2