From a7edf3898c4ebeeef7d4686957400753e9118df9 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 23 Apr 2023 13:55:21 +0100 Subject: [PATCH] --- openpower/sv/sprs.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/sv/sprs.mdwn b/openpower/sv/sprs.mdwn index 5c6920acc..17c4a99e0 100644 --- a/openpower/sv/sprs.mdwn +++ b/openpower/sv/sprs.mdwn @@ -167,7 +167,9 @@ batches neither Register Hazards nor Memory Hazards inter-element exist (but inter-group definitely does). This makes implementation far easier on resources because the Hazard Dependencies are -effectively at a much coarser granularity than a single register.* +effectively at a much coarser granularity than a single register. +With element-width overrides extending down to the byte level reducing Dependency +Hazard hardware complexity becomes even more important.* `hphint` may legitimately be set greater than `MAXVL`. This indicates to Multi-Issue hardware that even though MAXVL is relatively small the batches are *still independent* -- 2.30.2