From a81e99f50a718790de379087c9f5a636e32b2a28 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 26 Jul 2017 02:32:39 +0100 Subject: [PATCH] radv/ac: realign SI workaround with radeonsi. This ports: da7453666ae radeonsi: don't apply the Z export bug workaround to Hainan to radv. Just noticed in passing. Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver) Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 9a69066afa2..a427f484b56 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -5815,10 +5815,11 @@ si_export_mrt_z(struct nir_to_llvm_context *ctx, args.enabled_channels |= 0x4; } - /* SI (except OLAND) has a bug that it only looks + /* SI (except OLAND and HAINAN) has a bug that it only looks * at the X writemask component. */ if (ctx->options->chip_class == SI && - ctx->options->family != CHIP_OLAND) + ctx->options->family != CHIP_OLAND && + ctx->options->family != CHIP_HAINAN) args.enabled_channels |= 0x1; ac_build_export(&ctx->ac, &args); -- 2.30.2