From a8a393c4653918330ae43f2f8b0a21f26046352d Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 7 May 2022 17:00:41 +0100 Subject: [PATCH] --- openpower/sv/SimpleV_rationale.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index edbf7b6c1..b6ee4150d 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -239,7 +239,7 @@ instruction. *Packed SIMD looped algorithms actually have to contain multiple implementations processing fragments of data at -different SIMD widths: Cray-style Vectors have one, covering not +different SIMD widths: Cray-style Vectors have just the one, covering not just current architectural implementations but future ones with wider back-end ALUs as well.* -- 2.30.2