From a8abc47902f84db17733cf29ee06a841e30e8905 Mon Sep 17 00:00:00 2001 From: Tobias Platen Date: Sun, 9 May 2021 18:57:55 +0200 Subject: [PATCH] src/soc/fu/ldst/loadstore.py: add skeleton for fsm --- src/soc/fu/ldst/loadstore.py | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py index 0397f87d..bec6536d 100644 --- a/src/soc/fu/ldst/loadstore.py +++ b/src/soc/fu/ldst/loadstore.py @@ -99,6 +99,26 @@ class LoadStore1(PortInterfaceBase): #self.nia = Signal(64) #self.srr1 = Signal(16) + # fsm skeleton + with m.Switch(self.state): + with m.Case(State.IDLE): + pass + with m.Case(State.SECOND_REQ): + # req.eq(1); + # v.state.eq(ACK_WAIT) + # v.last_dword.eq(0); + pass + with m.Case(State.ACK_WAIT): + pass + with m.Case(State.MMU_LOOKUP): + pass + with m.Case(State.TLBIE_WAIT): + pass + with m.Case(State.FINISH_LFS): + pass + with m.Case(State.COMPLETE): + pass + def set_wr_addr(self, m, addr, mask, misalign): m.d.comb += self.load.eq(0) # store operation -- 2.30.2