From a90fe58bfb76683ce46529a2a3958949326f1d69 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 24 Mar 2018 00:45:34 +0000 Subject: [PATCH] write out interfaces.txt first version --- src/spec/gen.py | 18 ++++++- src/spec/interfaces.py | 104 ++++++++++++++++++++++++++++------------- src/spec/m_class.py | 37 ++++++++------- 3 files changed, 107 insertions(+), 52 deletions(-) diff --git a/src/spec/gen.py b/src/spec/gen.py index af42d42..bba6e44 100644 --- a/src/spec/gen.py +++ b/src/spec/gen.py @@ -1,2 +1,16 @@ -def specgen(pinouts, bankspec, fixedpins): - return +import os +import os.path + +def specgen(pth, pinouts, bankspec, fixedpins): + """ generates a specification of pinouts (tsv files) + for reading in by pinmux + """ + pth = pth or '' + print bankspec.keys() + print pinouts.keys() + print fixedpins.keys() + if not os.path.exists(pth): + os.makedirs(pth) + with open(os.path.join(pth, 'interfaces.txt'), 'w') as f: + for k in pinouts.fnspec.keys(): + f.write("%s\t%d\n" % (k.lower(), len(pinouts.fnspec[k]))) diff --git a/src/spec/interfaces.py b/src/spec/interfaces.py index ee18593..68da3c8 100644 --- a/src/spec/interfaces.py +++ b/src/spec/interfaces.py @@ -2,7 +2,8 @@ from copy import deepcopy -def pins(pingroup, bankspec, suffix, offs, bank, mux, spec=None, limit=None): +def pins(fname, pingroup, bankspec, suffix, offs, bank, mux, + spec=None, limit=None, origsuffix=None): res = {} names = {} idx = 0 @@ -37,19 +38,21 @@ def pins(pingroup, bankspec, suffix, offs, bank, mux, spec=None, limit=None): res[idx_].update(pin) else: res[idx_] = pin - return res + return fname, origsuffix, bank, res def i2s(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): i2spins = ['IISMCK', 'IISBCK', 'IISLRCK', 'IISDI'] for i in range(4): i2spins.append("IISDO%d" % i) - return pins(i2spins, bankspec, suffix, offs, bank, mux, spec, limit) + return pins('IIS', i2spins, bankspec, suffix, offs, bank, mux, spec, limit, + origsuffix=suffix) def emmc(bankspec, suffix, offs, bank, mux=1, spec=None): emmcpins = ['MMCCMD', 'MMCCLK'] for i in range(8): emmcpins.append("MMCD%d" % i) - return pins(emmcpins, bankspec, suffix, offs, bank, mux, spec) + return pins('MMC', emmcpins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def sdmmc(bankspec, suffix, offs, bank, mux=1, spec=None, start=None, limit=None): @@ -58,30 +61,36 @@ def sdmmc(bankspec, suffix, offs, bank, mux=1, spec=None, sdmmcpins.append("D%d" % i) sdmmcpins = sdmmcpins[start:limit] sdmmcpins = namesuffix('SD', suffix, sdmmcpins) - return pins(sdmmcpins, bankspec, '', offs, bank, mux, spec) + return pins('SD', sdmmcpins, bankspec, '', offs, bank, mux, spec, + origsuffix=suffix) def spi(bankspec, suffix, offs, bank, mux=1, spec=None): spipins = namesuffix('SPI', suffix, ['CLK', 'NSS', 'MOSI', 'MISO', 'NSS']) - return pins(spipins, bankspec, '', offs, bank, mux, spec) + return pins('SPI', spipins, bankspec, '', offs, bank, mux, spec, + origsuffix=suffix) def quadspi(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): - spipins = namesuffix('SPI', suffix, + spipins = namesuffix('QSPI', suffix, ['CK', 'NSS', 'IO0', 'IO1', 'IO2', 'IO3']) - return pins(spipins, bankspec, '', offs, bank, mux, spec, limit) + return pins('QSPI', spipins, bankspec, '', offs, bank, mux, spec, limit, + origsuffix=suffix) def i2c(bankspec, suffix, offs, bank, mux=1, spec=None): spipins = namesuffix('TWI', suffix, ['SDA', 'SCL']) - return pins(spipins, bankspec, '', offs, bank, mux, spec) + return pins('TWI', spipins, bankspec, '', offs, bank, mux, spec, + origsuffix=suffix) def jtag(bankspec, suffix, offs, bank, mux=1, spec=None): uartpins = namesuffix('JTAG', suffix, ['MS', 'DI', 'DO', 'CK']) - return pins(uartpins, bankspec, '', offs, bank, mux, spec) + return pins('JTAG', uartpins, bankspec, '', offs, bank, mux, spec, + origsuffix=suffix) def uart(bankspec, suffix, offs, bank, mux=1, spec=None): uartpins = namesuffix('UART', suffix, ['TX', 'RX']) - return pins(uartpins, bankspec, '', offs, bank, mux, spec) + return pins('UART', uartpins, bankspec, '', offs, bank, mux, spec, + origsuffix=suffix) def namesuffix(name, suffix, namelist): names = [] @@ -93,17 +102,20 @@ def ulpi(bankspec, suffix, offs, bank, mux=1, spec=None): ulpipins = namesuffix('ULPI', suffix, ['CK', 'DIR', 'STP', 'NXT']) for i in range(8): ulpipins.append('ULPI%s_D%d' % (suffix, i)) - return pins(ulpipins, bankspec, "", offs, bank, mux, spec) + return pins('ULPI', ulpipins, bankspec, "", offs, bank, mux, spec, + origsuffix=suffix) def uartfull(bankspec, suffix, offs, bank, mux=1, spec=None): uartpins = namesuffix('UART', suffix, ['TX', 'RX', 'CTS', 'RTS']) - return pins(uartpins, bankspec, '', offs, bank, mux, spec) + return pins('UART', uartpins, bankspec, '', offs, bank, mux, spec, + origsuffix=suffix) def rgbttl(bankspec, suffix, offs, bank, mux=1, spec=None): ttlpins = ['LCDCK', 'LCDDE', 'LCDHS', 'LCDVS'] for i in range(24): ttlpins.append("LCD%d" % i) - return pins(ttlpins, bankspec, suffix, offs, bank, mux, spec) + return pins('LCD', ttlpins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def rgmii(bankspec, suffix, offs, bank, mux=1, spec=None): buspins = [] @@ -117,28 +129,33 @@ def rgmii(bankspec, suffix, offs, bank, mux=1, spec=None): 'RG_EMDC', 'RG_EMDIO', 'RG_ETXEN', 'RG_ETXCK', 'RG_ECRS', 'RG_ECOL', 'RG_ETXERR'] - return pins(buspins, bankspec, suffix, offs, bank, mux, spec) + return pins('RG', buspins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def flexbus1(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins = [] for i in range(8): - buspins.append("FB_AD%d" % i) + buspins.append("AD%d" % i) for i in range(2): - buspins.append("FB_CS%d" % i) - buspins += ['FB_ALE', 'FB_OE', 'FB_RW', 'FB_TA', 'FB_CLK', - 'FB_A0', 'FB_A1', 'FB_TS', 'FB_TBST', - 'FB_TSIZ0', 'FB_TSIZ1'] + buspins.append("CS%d" % i) + buspins += ['ALE', 'OE', 'RW', 'TA', 'CLK', + 'A0', 'A1', 'TS', 'TBST', + 'TSIZ0', 'TSIZ1'] for i in range(4): - buspins.append("FB_BWE%d" % i) + buspins.append("BWE%d" % i) for i in range(2,6): - buspins.append("FB_CS%d" % i) - return pins(buspins, bankspec, suffix, offs, bank, mux, spec, limit) + buspins.append("CS%d" % i) + buspins = namesuffix('FB', suffix, buspins) + return pins('FB', buspins, bankspec, "", offs, bank, mux, spec, limit, + origsuffix=suffix) def flexbus2(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins = [] for i in range(8,32): - buspins.append("FB_AD%d" % i) - return pins(buspins, bankspec, suffix, offs, bank, mux, spec, limit) + buspins.append("AD%d" % i) + buspins = namesuffix('FB', suffix, buspins) + return pins('FB', buspins, bankspec, '', offs, bank, mux, spec, limit, + origsuffix=suffix) def sdram1(bankspec, suffix, offs, bank, mux=1, spec=None): buspins = [] @@ -156,7 +173,8 @@ def sdram1(bankspec, suffix, offs, bank, mux=1, spec=None): buspins.append("SDRBA%d" % i) buspins += ['SDRCKE', 'SDRRAS#', 'SDRCAS#', 'SDRWE#', 'SDRRST'] - return pins(buspins, bankspec, suffix, offs, bank, mux, spec) + return pins('SDR', buspins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def sdram2(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins = [] @@ -164,7 +182,8 @@ def sdram2(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins.append("SDRCS%d#" % i) for i in range(8,32): buspins.append("SDRDQ%d" % i) - return pins(buspins, bankspec, suffix, offs, bank, mux, spec, limit) + return pins('SDR', buspins, bankspec, suffix, offs, bank, mux, spec, limit, + origsuffix=suffix) def mcu8080(bankspec, suffix, offs, bank, mux=1, spec=None): buspins = [] @@ -178,22 +197,27 @@ def mcu8080(bankspec, suffix, offs, bank, mux=1, spec=None): buspins.append("MCUNRB%d" % i) buspins += ['MCUCD', 'MCURD', 'MCUWR', 'MCUCLE', 'MCUALE', 'MCURST'] - return pins(buspins, bankspec, suffix, offs, bank, mux, spec) + return pins('MCU', buspins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) -def _pinbank(bankspec, prefix, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, spec=None): +def _pinbank(bankspec, prefix, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, + spec=None): gpiopins = [] for i in range(gpiooffs, gpiooffs+gpionum): gpiopins.append("%s%s%d" % (prefix, bank, i)) - return pins(gpiopins, bankspec, suffix, offs, bank, mux, spec) + return pins('GPIO', gpiopins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def eint(bankspec, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, spec=None): gpiopins = [] for i in range(gpiooffs, gpiooffs+gpionum): gpiopins.append("EINT%d" % (i)) - return pins(gpiopins, bankspec, suffix, offs, bank, mux, spec) + return pins('EINT', gpiopins, bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def pwm(bankspec, suffix, offs, bank, mux=1, spec=None): - return pins(['PWM', ], bankspec, suffix, offs, bank, mux, spec) + return pins('PWM', ['PWM', ], bankspec, suffix, offs, bank, mux, spec, + origsuffix=suffix) def gpio(bankspec, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, spec=None): return _pinbank(bankspec, "GPIO", suffix, offs, bank, gpiooffs, @@ -421,6 +445,22 @@ def display_group(bankspec, title, todisplay, fns, pins, descriptions): print def pinmerge(pins, fn): + # hack, store the function specs in the pins dict + fname, suffix, bank, fn = fn + if not hasattr(pins, 'fnspec'): + pins.fnspec = {} + if fname == 'GPIO': + fname = fname + bank + if not pins.fnspec.has_key(fname): + pins.fnspec[fname] = {} + print fname, bank, suffix + if suffix or fname == 'EINT' or fname == 'PWM': + specname = fname + suffix + else: + specname = fname + bank + pins.fnspec[fname][specname] = fn + + # merge actual pins for (pinidx, v) in fn.items(): if not pins.has_key(pinidx): pins[pinidx] = v diff --git a/src/spec/m_class.py b/src/spec/m_class.py index 6afee67..5b5f9ff 100644 --- a/src/spec/m_class.py +++ b/src/spec/m_class.py @@ -1,5 +1,6 @@ #!/usr/bin/env python +from UserDict import UserDict from interfaces import jtag, uart, ulpi, uartfull, rgbttl, rgmii from interfaces import flexbus1, flexbus2, sdram1, sdram2, mcu8080 from interfaces import eint, pwm, gpio, spi, i2c, emmc, sdmmc @@ -8,7 +9,7 @@ from interfaces import display, display_fns, check_functions from interfaces import pinmerge, display_fixed def pinspec(): - pinouts = {} + pinouts = UserDict() pinbanks = {'A': 16, 'B': 28, @@ -44,7 +45,7 @@ def pinspec(): pinmerge(pinouts, gpio(bankspec, "", ('B', 0), "B", 0, 28, 0)) pinmerge(pinouts, rgbttl(bankspec, "0", ('B', 0), "B", 1)) pinmerge(pinouts, spi(bankspec, "1", ('B', 12), "B", 2)) - pinmerge(pinouts, quadspi(bankspec, "3", ('B', 4), "B", 2, limit=4)) + pinmerge(pinouts, quadspi(bankspec, "0", ('B', 4), "B", 2, limit=4)) pinmerge(pinouts, uart(bankspec, "3", ('B', 16), "B", 2)) pinmerge(pinouts, i2c(bankspec, "3", ('B', 18), "B", 2)) pinmerge(pinouts, pwm(bankspec, "0", ('B', 9), "B", mux=2)) @@ -52,7 +53,7 @@ def pinspec(): pinmerge(pinouts, pwm(bankspec, "2", ('B', 21), "B", mux=2)) pinmerge(pinouts, sdmmc(bankspec, "1", ('B', 22), "B", 2)) pinmerge(pinouts, eint(bankspec, "", ('B', 0), "B", 6, 4, mux=3)) - pinmerge(pinouts, flexbus2(bankspec, "", ('B', 4), "B", 3)) + pinmerge(pinouts, flexbus2(bankspec, "0", ('B', 4), "B", 3)) pinmerge(pinouts, i2c(bankspec, "1", ('B', 0), "B", 2)) pinmerge(pinouts, uart(bankspec, "2", ('B', 2), "B", 2)) pinmerge(pinouts, uart(bankspec, "4", ('B', 10), "B", 2)) @@ -84,7 +85,7 @@ def pinspec(): } #pinmerge(pinouts, mcu8080("", 72, "D", 1)) pinmerge(pinouts, gpio(bankspec, "", ('D', 0), "D", 0, 24, 0)) - pinmerge(pinouts, flexbus1(bankspec, "", ('D', 0), "D", 1, spec=flexspec)) + pinmerge(pinouts, flexbus1(bankspec, "0", ('D', 0), "D", 1, spec=flexspec)) pinmerge(pinouts, i2c(bankspec, "2", ('D', 17), "D", 2)) pinmerge(pinouts, pwm(bankspec, "0", ('D', 21), "D", mux=1)) pinmerge(pinouts, pwm(bankspec, "1", ('D', 22), "D", mux=1)) @@ -103,10 +104,10 @@ def pinspec(): # Bank E pinmerge(pinouts, gpio(bankspec, "", ('E', 0), "E", 0, 24, 0)) - pinmerge(pinouts, flexbus2(bankspec, "", ('E', 0), "E", 1)) + pinmerge(pinouts, flexbus2(bankspec, "0", ('E', 0), "E", 1)) pinmerge(pinouts, sdmmc(bankspec, "2", ('E', 0), "E", 2)) pinmerge(pinouts, sdmmc(bankspec, "3", ('E', 8), "E", 2)) - pinmerge(pinouts, quadspi(bankspec, "3", ('E', 18), "E", 2)) + pinmerge(pinouts, quadspi(bankspec, "0", ('E', 18), "E", 2)) pinmerge(pinouts, uartfull(bankspec, "1", ('E', 14), "E", 2)) pinmerge(pinouts, i2c(bankspec, "2", ('E', 6), "E", 2)) pinmerge(pinouts, eint(bankspec, "", ('E', 0), "E", 10, 8, mux=3)) @@ -131,8 +132,8 @@ def pinspec(): pinmerge(pinouts, rgmii(bankspec, "", ('G', 0), "G", 1)) pinmerge(pinouts, ulpi(bankspec, "3", ('G', 20), "G", 1)) pinmerge(pinouts, rgbttl(bankspec, "1", ('G', 0), "G", 2)) - pinmerge(pinouts, quadspi(bankspec, "3", ('G', 26), "G", 3)) - pinmerge(pinouts, flexbus2(bankspec, "", ('G', 0), "G", 3)) + pinmerge(pinouts, quadspi(bankspec, "0", ('G', 26), "G", 3)) + pinmerge(pinouts, flexbus2(bankspec, "0", ('G', 0), "G", 3)) mmc2 = sdmmc(bankspec, "2", ('G', 24), "G", 3, limit=2) pinmerge(pinouts, mmc2) mmc2 = sdmmc(bankspec, "2", ('G', 28), "G", 2, start=2) @@ -236,7 +237,7 @@ def pinspec(): 'SD3': 'SD/MMC 3', 'SPI1': 'SPI (Serial Peripheral Interface) 1', 'SPI2': 'SPI (Serial Peripheral Interface) 2', - 'SPI3': 'Quad SPI (Serial Peripheral Interface) 3', + 'QSPI': 'Quad SPI (Serial Peripheral Interface) 1', 'TWI1': 'I2C 1', 'TWI2': 'I2C 2', 'TWI3': 'I2C 3', @@ -294,12 +295,12 @@ def pinspec(): # OTG_ID (if to be used) would require dropping some functions in order # to free up GPIO. LCD could be reduced to 15-bit (freeing 3). # MMC could be reduced to 4-bit-wide, used as SD/MMC (freeing 4). - # SPI3 could be used in 1-bit (MOSI/MISO) mode (freeing up 2 more). + # QSPI could be used in 1-bit (MOSI/MISO) mode (freeing up 2 more). industrial = ['D1:FB/17', 'E1:FB/8', 'B1:LCD/22', 'ULPI1/8', 'ULPI2/8', 'MMC', 'B2:SD1', 'JTAG1', 'A3:UART2', 'E2:UART1', 'C3:UART0', - 'F2:TWI1', 'D2:TWI2', 'D2:TWI3', 'SPI2', 'SPI3', 'F2:SD3'] + 'F2:TWI1', 'D2:TWI2', 'D2:TWI3', 'SPI2', 'QSPI', 'F2:SD3'] industrial_pwm = ['F2:PWM_0', 'F2:PWM_1', 'D1:PWM_2'] industrial_eint = ['EINT24', 'EINT25', 'EINT26', 'EINT27', 'EINT20', 'EINT21', 'EINT22', 'EINT23'] @@ -319,7 +320,7 @@ def pinspec(): 'MMC', 'B2:SD1', 'JTAG1', 'A3:UART2', 'E2:UART1', 'C3:UART0', 'B2:UART4', 'B2:UART3', - 'F2:TWI1', 'D2:TWI2', 'D2:TWI3', 'SPI2', 'SPI3', 'F2:SD3'] + 'F2:TWI1', 'D2:TWI2', 'D2:TWI3', 'SPI2', 'QSPI', 'F2:SD3'] industrial_pwm = ['F2:PWM_0', 'F2:PWM_1', 'D1:PWM_2'] industrial_eint = ['EINT24', 'EINT25', 'EINT26', 'EINT27', 'EINT20', 'EINT21', 'EINT22', 'EINT23'] @@ -343,7 +344,7 @@ def pinspec(): 'C3:UART0', # GPS 'D2:UART3', 'D2:UART4', - 'D3:TWI1', 'D2:TWI3', 'SPI2', 'SPI3'] + 'D3:TWI1', 'D2:TWI3', 'SPI2', 'QSPI'] tablet_pwm = ['F2:PWM_0', # LCD_BACKLIGHT 'F2:PWM_1', 'D1:PWM_2'] tablet_eint = ['EINT24', # BT_HOST_WAKE @@ -374,7 +375,7 @@ def pinspec(): 'TWI2': 'Connect to AC97 Audio IC', 'E2:UART1': 'Connect to BT on AP6234/AP6335', 'E2:SD2': 'Connect to WIFI on AP6234/AP6335', - 'SPI3': 'Boot Storage (connection to companion / debug / boot MCU)\n' + 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.', 'SPI2': 'Spare? SPI, connect to higher-speed sensor?', @@ -421,7 +422,7 @@ def pinspec(): 'TWI2', # I2C Audio 'E2:UART1', # WIFI/BT 'E2:SD3', # WIFI - 'D2:TWI3', 'SPI3'] + 'D2:TWI3', 'QSPI'] laptop_pwm = ['F2:PWM_0', # LCD_BACKLIGHT ] laptop_eint = ['EINT20', # BT_HOST_WAKE @@ -450,7 +451,7 @@ def pinspec(): 'TWI2': 'Connect to AC97 Audio IC', 'E2:UART1': 'Connect to BT on AP6234/AP6335', 'E2:SD3': 'Connect to WIFI on AP6234/AP6335', - 'SPI3': 'Boot Storage (connection to companion / debug / boot MCU)\n' + 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.\n' 'MCU implements keyboard-matrix for keyboard (also trackpad?)', @@ -480,7 +481,7 @@ def pinspec(): 'C2:SPI2', # HSPI SPI 'E2:SD3', # WIFI 'D3:TWI1', # sensors CTP, - 'D2:TWI3', 'SPI3'] + 'D2:TWI3', 'QSPI'] iot_pwm = ['F2:PWM_0', # LCD_BACKLIGHT ] iot_eint = [ 'EINT5', # 'HSPA_MST_RDY', @@ -516,7 +517,7 @@ def pinspec(): 'E2:UART1': 'Connect to BT UART', 'E2:SD3': 'Connect to WIFI', 'C2:SPI2': 'HSPA SPI', - 'SPI3': 'Boot Storage (connection to companion / debug / boot MCU)\n' + 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.\n' 'MCU implements keyboard-matrix for keyboard (also trackpad?)', -- 2.30.2