From a918548079a2af0db87abf7611aac4ab4b691c39 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 29 Nov 2016 20:26:49 +0100 Subject: [PATCH] sse.md (UNSPEC_MASKOP): Move from i386.md. * config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md. (mshift): Ditto. (SWI1248_AVX512BWDQ): Ditto. (SWI1248_AVX512BW): Ditto. (k): Ditto. (kandn): Ditto. (kxnor): Ditto. (knot): Ditto. (*k): Ditto. (kortestzhi, kortestchi): Ditto. (kunpckhi, kunpcksi, kunpckdi): Ditto. testsuite/ChangeLog: * gcc.target/i386/avx512f-kmovw-1.c (avx512f_test): Force value through k register. From-SVN: r242971 --- gcc/ChangeLog | 30 ++- gcc/config/i386/i386.md | 184 ---------------- gcc/config/i386/sse.md | 196 +++++++++++++++++- gcc/testsuite/ChangeLog | 5 + .../gcc.target/i386/avx512f-kmovw-1.c | 5 +- 5 files changed, 225 insertions(+), 195 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 10660b74feb..f9bcdbd9e49 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +2016-11-29 Uros Bizjak + + * config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md. + (mshift): Ditto. + (SWI1248_AVX512BWDQ): Ditto. + (SWI1248_AVX512BW): Ditto. + (k): Ditto. + (kandn): Ditto. + (kxnor): Ditto. + (knot): Ditto. + (*k): Ditto. + (kortestzhi, kortestchi): Ditto. + (kunpckhi, kunpcksi, kunpckdi): Ditto. + 2016-11-29 Andrew Pinski * tree-vrp.c (simplify_stmt_using_ranges): Use boolean_type_node @@ -16,8 +30,9 @@ * config/avr/avr-devices.c(avr_mcu_types): Add flash size info. * config/avr/avr-mcu.def: Likewise. * config/avr/gen-avr-mmcu-specs.c (print_mcu): Remove hard-coded prefix - check to find wrap-around value, instead use MCU flash size. For 8k flash - devices, update link_pmem_wrap spec string to add --pmem-wrap-around=8k. + check to find wrap-around value, instead use MCU flash size. For 8k + flash devices, update link_pmem_wrap spec string to add + --pmem-wrap-around=8k. * config/avr/specs.h: Remove link_pmem_wrap from LINK_RELAX_SPEC and add to linker specs (LINK_SPEC) directly. @@ -202,9 +217,8 @@ 2016-11-28 Richard Biener - * tree-vrp.c (vrp_visit_assignment_or_call): Handle - simplifications to SSA names via extract_range_from_ssa_name - if allowed. + * tree-vrp.c (vrp_visit_assignment_or_call): Handle simplifications + to SSA names via extract_range_from_ssa_name if allowed. 2016-11-28 Richard Biener @@ -214,9 +228,8 @@ 2016-11-28 Paolo Bonzini - * combine.c (simplify_if_then_else): Simplify IF_THEN_ELSE - that isolates a single bit, even if the condition involves - subregs. + * combine.c (simplify_if_then_else): Simplify IF_THEN_ELSE that + isolates a single bit, even if the condition involves subregs. 2016-11-28 Tamar Christina @@ -305,6 +318,7 @@ (vdupq_laneq_p64): Likewise. 2016-11-28 Tamar Christina + * config/arm/arm_neon.h (vget_lane_p64): New. 2016-11-28 Iain Sandoe diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d7cce66d841..ed525b97a3d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -186,9 +186,6 @@ UNSPEC_PDEP UNSPEC_PEXT - ;; For AVX512F support - UNSPEC_KMASKOP - UNSPEC_BNDMK UNSPEC_BNDMK_ADDR UNSPEC_BNDSTX @@ -921,9 +918,6 @@ (define_code_attr shift [(ashift "sll") (lshiftrt "shr") (ashiftrt "sar")]) (define_code_attr vshift [(ashift "sll") (lshiftrt "srl") (ashiftrt "sra")]) -;; Mask variant left right mnemonics -(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")]) - ;; Mapping of rotate operators (define_code_iterator any_rotate [rotate rotatert]) @@ -966,15 +960,6 @@ ;; All integer modes. (define_mode_iterator SWI1248x [QI HI SI DI]) -;; All integer modes with AVX512BW/DQ. -(define_mode_iterator SWI1248_AVX512BWDQ - [(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")]) - -;; All integer modes with AVX512BW, where HImode operation -;; can be used instead of QImode. -(define_mode_iterator SWI1248_AVX512BW - [QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")]) - ;; All integer modes without QImode. (define_mode_iterator SWI248x [HI SI DI]) @@ -2489,11 +2474,6 @@ ] (const_string "SI")))]) -(define_expand "kmovw" - [(set (match_operand:HI 0 "nonimmediate_operand") - (match_operand:HI 1 "nonimmediate_operand"))] - "TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))") - (define_insn "*movhi_internal" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k ,r,m") (match_operand:HI 1 "general_operand" "r ,rn,rm,rn,r,km,k,k"))] @@ -8061,28 +8041,6 @@ operands[3] = gen_lowpart (QImode, operands[3]); }) -(define_insn "k" - [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") - (any_logic:SWI1248_AVX512BW - (match_operand:SWI1248_AVX512BW 1 "register_operand" "k") - (match_operand:SWI1248_AVX512BW 2 "register_operand" "k"))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)] - "TARGET_AVX512F" -{ - if (get_attr_mode (insn) == MODE_HI) - return "kw\t{%2, %1, %0|%0, %1, %2}"; - else - return "k\t{%2, %1, %0|%0, %1, %2}"; -} - [(set_attr "type" "msklog") - (set_attr "prefix" "vex") - (set (attr "mode") - (cond [(and (match_test "mode == QImode") - (not (match_test "TARGET_AVX512DQ"))) - (const_string "HI") - ] - (const_string "")))]) - ;; %%% This used to optimize known byte-wide and operations to memory, ;; and sometimes to QImode registers. If this is considered useful, ;; it should be done with splitters. @@ -8576,29 +8534,6 @@ operands[2] = gen_lowpart (QImode, operands[2]); }) -(define_insn "kandn" - [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") - (and:SWI1248_AVX512BW - (not:SWI1248_AVX512BW - (match_operand:SWI1248_AVX512BW 1 "register_operand" "k")) - (match_operand:SWI1248_AVX512BW 2 "register_operand" "k"))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)] - "TARGET_AVX512F" -{ - if (get_attr_mode (insn) == MODE_HI) - return "kandnw\t{%2, %1, %0|%0, %1, %2}"; - else - return "kandn\t{%2, %1, %0|%0, %1, %2}"; -} - [(set_attr "type" "msklog") - (set_attr "prefix" "vex") - (set (attr "mode") - (cond [(and (match_test "mode == QImode") - (not (match_test "TARGET_AVX512DQ"))) - (const_string "HI") - ] - (const_string "")))]) - (define_insn_and_split "*andndi3_doubleword" [(set (match_operand:DI 0 "register_operand" "=r") (and:DI @@ -8987,92 +8922,6 @@ (set_attr "type" "alu") (set_attr "modrm" "1") (set_attr "mode" "QI")]) - -(define_insn "kxnor" - [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") - (not:SWI1248_AVX512BW - (xor:SWI1248_AVX512BW - (match_operand:SWI1248_AVX512BW 1 "register_operand" "k") - (match_operand:SWI1248_AVX512BW 2 "register_operand" "k")))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)] - "TARGET_AVX512F" -{ - if (get_attr_mode (insn) == MODE_HI) - return "kxnorw\t{%2, %1, %0|%0, %1, %2}"; - else - return "kxnor\t{%2, %1, %0|%0, %1, %2}"; -} - [(set_attr "type" "msklog") - (set_attr "prefix" "vex") - (set (attr "mode") - (cond [(and (match_test "mode == QImode") - (not (match_test "TARGET_AVX512DQ"))) - (const_string "HI") - ] - (const_string "")))]) - -;;There are kortrest[bdq] but no intrinsics for them. -;;We probably don't need to implement them. -(define_insn "kortestzhi" - [(set (reg:CCZ FLAGS_REG) - (compare:CCZ - (ior:HI - (match_operand:HI 0 "register_operand" "k") - (match_operand:HI 1 "register_operand" "k")) - (const_int 0)))] - "TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)" - "kortestw\t{%1, %0|%0, %1}" - [(set_attr "mode" "HI") - (set_attr "type" "msklog") - (set_attr "prefix" "vex")]) - -(define_insn "kortestchi" - [(set (reg:CCC FLAGS_REG) - (compare:CCC - (ior:HI - (match_operand:HI 0 "register_operand" "k") - (match_operand:HI 1 "register_operand" "k")) - (const_int -1)))] - "TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)" - "kortestw\t{%1, %0|%0, %1}" - [(set_attr "mode" "HI") - (set_attr "type" "msklog") - (set_attr "prefix" "vex")]) - -(define_insn "kunpckhi" - [(set (match_operand:HI 0 "register_operand" "=k") - (ior:HI - (ashift:HI - (zero_extend:HI (match_operand:QI 1 "register_operand" "k")) - (const_int 8)) - (zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))] - "TARGET_AVX512F" - "kunpckbw\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "mode" "HI") - (set_attr "type" "msklog") - (set_attr "prefix" "vex")]) - -(define_insn "kunpcksi" - [(set (match_operand:SI 0 "register_operand" "=k") - (ior:SI - (ashift:SI - (zero_extend:SI (match_operand:HI 1 "register_operand" "k")) - (const_int 16)) - (zero_extend:SI (match_operand:HI 2 "register_operand" "k"))))] - "TARGET_AVX512BW" - "kunpckwd\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "mode" "SI")]) - -(define_insn "kunpckdi" - [(set (match_operand:DI 0 "register_operand" "=k") - (ior:DI - (ashift:DI - (zero_extend:DI (match_operand:SI 1 "register_operand" "k")) - (const_int 32)) - (zero_extend:DI (match_operand:SI 2 "register_operand" "k"))))] - "TARGET_AVX512BW" - "kunpckdq\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "mode" "DI")]) ;; Negation instructions @@ -9463,27 +9312,6 @@ ;; One complement instructions -(define_insn "knot" - [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") - (not:SWI1248_AVX512BW - (match_operand:SWI1248_AVX512BW 1 "register_operand" "k"))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)] - "TARGET_AVX512F" -{ - if (get_attr_mode (insn) == MODE_HI) - return "knotw\t{%1, %0|%0, %1}"; - else - return "knot\t{%1, %0|%0, %1}"; -} - [(set_attr "type" "msklog") - (set_attr "prefix" "vex") - (set (attr "mode") - (cond [(and (match_test "mode == QImode") - (not (match_test "TARGET_AVX512DQ"))) - (const_string "HI") - ] - (const_string "")))]) - (define_expand "one_cmpl2" [(set (match_operand:SWIM 0 "nonimmediate_operand") (not:SWIM (match_operand:SWIM 1 "nonimmediate_operand")))] @@ -9600,18 +9428,6 @@ ;; shift pair, instead using moves and sign extension for counts greater ;; than 31. -(define_insn "*k" - [(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k") - (any_lshift:SWI1248_AVX512BWDQ - (match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k") - (match_operand:QI 2 "immediate_operand" "n"))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)] - "TARGET_AVX512F" - "k\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "msklog") - (set_attr "prefix" "vex") - (set_attr "mode" "")]) - (define_expand "ashl3" [(set (match_operand:SDWIM 0 "") (ashift:SDWIM (match_operand:SDWIM 1 "") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 82d49985f7e..454aeca75e1 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -106,6 +106,9 @@ UNSPEC_MASKED_EQ UNSPEC_MASKED_GT + ;; Mask operations + UNSPEC_MASKOP + ;; For embed. rounding feature UNSPEC_EMBEDDED_ROUNDING @@ -1288,6 +1291,195 @@ UNSPEC_MOVNT))] "TARGET_SSE") +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Mask operations +;; +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +;; All integer modes with AVX512BW/DQ. +(define_mode_iterator SWI1248_AVX512BWDQ + [(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")]) + +;; All integer modes with AVX512BW, where HImode operation +;; can be used instead of QImode. +(define_mode_iterator SWI1248_AVX512BW + [QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")]) + +;; Mask variant shift mnemonics +(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")]) + +(define_expand "kmovw" + [(set (match_operand:HI 0 "nonimmediate_operand") + (match_operand:HI 1 "nonimmediate_operand"))] + "TARGET_AVX512F + && !(MEM_P (operands[0]) && MEM_P (operands[1]))") + +(define_insn "k" + [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") + (any_logic:SWI1248_AVX512BW + (match_operand:SWI1248_AVX512BW 1 "register_operand" "k") + (match_operand:SWI1248_AVX512BW 2 "register_operand" "k"))) + (unspec [(const_int 0)] UNSPEC_MASKOP)] + "TARGET_AVX512F" +{ + if (get_attr_mode (insn) == MODE_HI) + return "kw\t{%2, %1, %0|%0, %1, %2}"; + else + return "k\t{%2, %1, %0|%0, %1, %2}"; +} + [(set_attr "type" "msklog") + (set_attr "prefix" "vex") + (set (attr "mode") + (cond [(and (match_test "mode == QImode") + (not (match_test "TARGET_AVX512DQ"))) + (const_string "HI") + ] + (const_string "")))]) + +(define_insn "kandn" + [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") + (and:SWI1248_AVX512BW + (not:SWI1248_AVX512BW + (match_operand:SWI1248_AVX512BW 1 "register_operand" "k")) + (match_operand:SWI1248_AVX512BW 2 "register_operand" "k"))) + (unspec [(const_int 0)] UNSPEC_MASKOP)] + "TARGET_AVX512F" +{ + if (get_attr_mode (insn) == MODE_HI) + return "kandnw\t{%2, %1, %0|%0, %1, %2}"; + else + return "kandn\t{%2, %1, %0|%0, %1, %2}"; +} + [(set_attr "type" "msklog") + (set_attr "prefix" "vex") + (set (attr "mode") + (cond [(and (match_test "mode == QImode") + (not (match_test "TARGET_AVX512DQ"))) + (const_string "HI") + ] + (const_string "")))]) + +(define_insn "kxnor" + [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") + (not:SWI1248_AVX512BW + (xor:SWI1248_AVX512BW + (match_operand:SWI1248_AVX512BW 1 "register_operand" "k") + (match_operand:SWI1248_AVX512BW 2 "register_operand" "k")))) + (unspec [(const_int 0)] UNSPEC_MASKOP)] + "TARGET_AVX512F" +{ + if (get_attr_mode (insn) == MODE_HI) + return "kxnorw\t{%2, %1, %0|%0, %1, %2}"; + else + return "kxnor\t{%2, %1, %0|%0, %1, %2}"; +} + [(set_attr "type" "msklog") + (set_attr "prefix" "vex") + (set (attr "mode") + (cond [(and (match_test "mode == QImode") + (not (match_test "TARGET_AVX512DQ"))) + (const_string "HI") + ] + (const_string "")))]) + +(define_insn "knot" + [(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k") + (not:SWI1248_AVX512BW + (match_operand:SWI1248_AVX512BW 1 "register_operand" "k"))) + (unspec [(const_int 0)] UNSPEC_MASKOP)] + "TARGET_AVX512F" +{ + if (get_attr_mode (insn) == MODE_HI) + return "knotw\t{%1, %0|%0, %1}"; + else + return "knot\t{%1, %0|%0, %1}"; +} + [(set_attr "type" "msklog") + (set_attr "prefix" "vex") + (set (attr "mode") + (cond [(and (match_test "mode == QImode") + (not (match_test "TARGET_AVX512DQ"))) + (const_string "HI") + ] + (const_string "")))]) + +(define_insn "*k" + [(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k") + (any_lshift:SWI1248_AVX512BWDQ + (match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k") + (match_operand:QI 2 "immediate_operand" "n"))) + (unspec [(const_int 0)] UNSPEC_MASKOP)] + "TARGET_AVX512F" + "k\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "msklog") + (set_attr "prefix" "vex") + (set_attr "mode" "")]) + +;;There are kortrest[bdq] but no intrinsics for them. +;;We probably don't need to implement them. +(define_insn "kortestzhi" + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (ior:HI + (match_operand:HI 0 "register_operand" "k") + (match_operand:HI 1 "register_operand" "k")) + (const_int 0)))] + "TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)" + "kortestw\t{%1, %0|%0, %1}" + [(set_attr "mode" "HI") + (set_attr "type" "msklog") + (set_attr "prefix" "vex")]) + +(define_insn "kortestchi" + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (ior:HI + (match_operand:HI 0 "register_operand" "k") + (match_operand:HI 1 "register_operand" "k")) + (const_int -1)))] + "TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)" + "kortestw\t{%1, %0|%0, %1}" + [(set_attr "mode" "HI") + (set_attr "type" "msklog") + (set_attr "prefix" "vex")]) + +(define_insn "kunpckhi" + [(set (match_operand:HI 0 "register_operand" "=k") + (ior:HI + (ashift:HI + (zero_extend:HI (match_operand:QI 1 "register_operand" "k")) + (const_int 8)) + (zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))] + "TARGET_AVX512F" + "kunpckbw\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "mode" "HI") + (set_attr "type" "msklog") + (set_attr "prefix" "vex")]) + +(define_insn "kunpcksi" + [(set (match_operand:SI 0 "register_operand" "=k") + (ior:SI + (ashift:SI + (zero_extend:SI (match_operand:HI 1 "register_operand" "k")) + (const_int 16)) + (zero_extend:SI (match_operand:HI 2 "register_operand" "k"))))] + "TARGET_AVX512BW" + "kunpckwd\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "mode" "SI")]) + +(define_insn "kunpckdi" + [(set (match_operand:DI 0 "register_operand" "=k") + (ior:DI + (ashift:DI + (zero_extend:DI (match_operand:SI 1 "register_operand" "k")) + (const_int 32)) + (zero_extend:DI (match_operand:SI 2 "register_operand" "k"))))] + "TARGET_AVX512BW" + "kunpckdq\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "mode" "DI")]) + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel floating point arithmetic @@ -13716,7 +13908,7 @@ [(set (subreg:HI (match_operand:QI 0 "register_operand") 0) (lshiftrt:HI (match_operand:HI 1 "register_operand") (const_int 8))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)])] + (unspec [(const_int 0)] UNSPEC_MASKOP)])] "TARGET_AVX512F") (define_expand "vec_unpacks_hi_" @@ -13725,7 +13917,7 @@ (match_operand: 0 "register_operand") 0) (lshiftrt:SWI48x (match_operand:SWI48x 1 "register_operand") (match_dup 2))) - (unspec [(const_int 0)] UNSPEC_KMASKOP)])] + (unspec [(const_int 0)] UNSPEC_MASKOP)])] "TARGET_AVX512BW" "operands[2] = GEN_INT (GET_MODE_BITSIZE (mode));") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2107f7eacc1..c86c345055e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-11-29 Uros Bizjak + + * gcc.target/i386/avx512f-kmovw-1.c (avx512f_test): + Force value through k register. + 2016-11-29 David Malcolm PR c++/72774 diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c index d0cede06a3c..95173e9b526 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c @@ -8,5 +8,8 @@ volatile __mmask16 k1; void avx512f_test () { - k1 = _mm512_kmov (11); + __mmask16 k = _mm512_kmov (11); + + asm volatile ("" : "+k" (k)); + k1 = k; } -- 2.30.2