From a92981027758e2b9c6aafbbf91657f9e5e22e90d Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Mon, 14 Jul 2008 03:54:27 +0000 Subject: [PATCH] * gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s, logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s, parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line endings. --- gas/testsuite/ChangeLog | 7 + gas/testsuite/gas/bfin/bit2.s | 196 ++--- gas/testsuite/gas/bfin/cache2.s | 172 ++-- gas/testsuite/gas/bfin/control_code2.s | 514 ++++++------ gas/testsuite/gas/bfin/event2.s | 82 +- gas/testsuite/gas/bfin/logical2.s | 138 +-- gas/testsuite/gas/bfin/move2.s | 1060 ++++++++++++------------ gas/testsuite/gas/bfin/parallel.s | 282 +++---- gas/testsuite/gas/bfin/parallel2.s | 160 ++-- gas/testsuite/gas/bfin/parallel3.s | 190 ++--- gas/testsuite/gas/bfin/parallel4.s | 86 +- gas/testsuite/gas/bfin/shift2.s | 580 ++++++------- gas/testsuite/gas/bfin/stack2.s | 250 +++--- gas/testsuite/gas/bfin/video2.s | 440 +++++----- 14 files changed, 2082 insertions(+), 2075 deletions(-) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 680badd06e5..243b62bd000 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2008-07-14 Jie Zhang + + * gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s, + logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s, + parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line + endings. + 2008-07-10 Richard Sandiford * gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests. diff --git a/gas/testsuite/gas/bfin/bit2.s b/gas/testsuite/gas/bfin/bit2.s index 1977ef7fe3c..2e062298502 100755 --- a/gas/testsuite/gas/bfin/bit2.s +++ b/gas/testsuite/gas/bfin/bit2.s @@ -1,98 +1,98 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//8 BIT OPERATIONS -// - -//BITCLR ( Dreg , uimm5 ) ; /* (a) */ -BITCLR ( R7 , 0 ) ; -BITCLR ( R7 , 31 ) ; -BITCLR ( R7 , 15 ) ; -BITCLR ( R1 , 0 ) ; -BITCLR ( R2 , 1 ) ; -BITCLR ( R3 , 19 ) ; - -//BITSET ( Dreg , uimm5 ) ; /* (a) */ -BITSET ( R7 , 0 ) ; -BITSET ( R7 , 31 ) ; -BITSET ( R7 , 15 ) ; -BITSET ( R1 , 0 ) ; -BITSET ( R2 , 1 ) ; -BITSET ( R3 , 19 ) ; - -//BITTGL ( Dreg , uimm5 ) ; /* (a) */ -BITTGL ( R7 , 0 ) ; -BITTGL ( R7 , 31 ) ; -BITTGL ( R7 , 15 ) ; -BITTGL ( R1 , 0 ) ; -BITTGL ( R2 , 1 ) ; -BITTGL ( R3 , 19 ) ; - -//CC = BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 1 (a)*/ -CC = BITTST ( R7 , 0 ) ; -CC = BITTST ( R7 , 31 ) ; -CC = BITTST ( R7 , 15 ) ; -CC = BITTST ( R1 , 0 ) ; -CC = BITTST ( R2 , 1 ) ; -CC = BITTST ( R3 , 19 ) ; - -//CC = ! BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 0 (a)*/ -CC = !BITTST ( R7 , 0 ) ; -CC = !BITTST ( R7 , 31 ) ; -CC = !BITTST ( R7 , 15 ) ; -CC = !BITTST ( R1 , 0 ) ; -CC = !BITTST ( R2 , 1 ) ; -CC = !BITTST ( R3 , 19 ) ; - -//Dreg = DEPOSIT ( Dreg, Dreg ) ; /* no extension (b) */ -R7 = DEPOSIT(R0, R1); -R7 = DEPOSIT(R7, R1); -R7 = DEPOSIT(R7, R7); -R1 = DEPOSIT(R0, R1); -R2 = DEPOSIT(R7, R1); -R3 = DEPOSIT(R7, R7); - -//Dreg = DEPOSIT ( Dreg, Dreg ) (X) ; /* sign-extended (b) */ -R7 = DEPOSIT(R0, R1)(X); -R7 = DEPOSIT(R7, R1)(X); -R7 = DEPOSIT(R7, R7)(X); -R1 = DEPOSIT(R0, R1)(X); -R2 = DEPOSIT(R7, R1)(X); -R3 = DEPOSIT(R7, R7)(X); - -//Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/ -R7 = EXTRACT(R0, R1.L)(Z); -R7 = EXTRACT(R7, R1.L)(Z); -R7 = EXTRACT(R7, R7.L)(Z); -R1 = EXTRACT(R0, R1.L)(Z); -R2 = EXTRACT(R7, R1.L)(Z); -R3 = EXTRACT(R7, R7.L)(Z); - -//Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/ -R7 = EXTRACT(R0, R1.L)(X); -R7 = EXTRACT(R7, R1.L)(X); -R7 = EXTRACT(R7, R7.L)(X); -R1 = EXTRACT(R0, R1.L)(X); -R2 = EXTRACT(R7, R1.L)(X); -R3 = EXTRACT(R7, R7.L)(X); - -//BITMUX ( Dreg , Dreg , A0 ) (ASR) ; /* shift right, LSB is shifted out (b) */ -BITMUX(R0, R1, A0)(ASR); -BITMUX(R0, R2, A0)(ASR); -BITMUX(R1, R3, A0)(ASR); -//BITMUX(R0, R0, A0)(ASR); - -//BITMUX ( Dreg , Dreg , A0 ) (ASL) ; /* shift left, MSB is shifted out (b) */ -//BITMUX(R0, R0, A0)(ASL); -BITMUX(R0, R1, A0)(ASL); -BITMUX(R1, R2, A0)(ASL); - -//Dreg_lo = ONES Dreg ; /* (b) */ -R0.L = ONES R0; -R0.L = ONES R1; -R1.L = ONES R6; -R2.L = ONES R7; - - + +.EXTERN MY_LABEL2; +.section .text; + +// +//8 BIT OPERATIONS +// + +//BITCLR ( Dreg , uimm5 ) ; /* (a) */ +BITCLR ( R7 , 0 ) ; +BITCLR ( R7 , 31 ) ; +BITCLR ( R7 , 15 ) ; +BITCLR ( R1 , 0 ) ; +BITCLR ( R2 , 1 ) ; +BITCLR ( R3 , 19 ) ; + +//BITSET ( Dreg , uimm5 ) ; /* (a) */ +BITSET ( R7 , 0 ) ; +BITSET ( R7 , 31 ) ; +BITSET ( R7 , 15 ) ; +BITSET ( R1 , 0 ) ; +BITSET ( R2 , 1 ) ; +BITSET ( R3 , 19 ) ; + +//BITTGL ( Dreg , uimm5 ) ; /* (a) */ +BITTGL ( R7 , 0 ) ; +BITTGL ( R7 , 31 ) ; +BITTGL ( R7 , 15 ) ; +BITTGL ( R1 , 0 ) ; +BITTGL ( R2 , 1 ) ; +BITTGL ( R3 , 19 ) ; + +//CC = BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 1 (a)*/ +CC = BITTST ( R7 , 0 ) ; +CC = BITTST ( R7 , 31 ) ; +CC = BITTST ( R7 , 15 ) ; +CC = BITTST ( R1 , 0 ) ; +CC = BITTST ( R2 , 1 ) ; +CC = BITTST ( R3 , 19 ) ; + +//CC = ! BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 0 (a)*/ +CC = !BITTST ( R7 , 0 ) ; +CC = !BITTST ( R7 , 31 ) ; +CC = !BITTST ( R7 , 15 ) ; +CC = !BITTST ( R1 , 0 ) ; +CC = !BITTST ( R2 , 1 ) ; +CC = !BITTST ( R3 , 19 ) ; + +//Dreg = DEPOSIT ( Dreg, Dreg ) ; /* no extension (b) */ +R7 = DEPOSIT(R0, R1); +R7 = DEPOSIT(R7, R1); +R7 = DEPOSIT(R7, R7); +R1 = DEPOSIT(R0, R1); +R2 = DEPOSIT(R7, R1); +R3 = DEPOSIT(R7, R7); + +//Dreg = DEPOSIT ( Dreg, Dreg ) (X) ; /* sign-extended (b) */ +R7 = DEPOSIT(R0, R1)(X); +R7 = DEPOSIT(R7, R1)(X); +R7 = DEPOSIT(R7, R7)(X); +R1 = DEPOSIT(R0, R1)(X); +R2 = DEPOSIT(R7, R1)(X); +R3 = DEPOSIT(R7, R7)(X); + +//Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/ +R7 = EXTRACT(R0, R1.L)(Z); +R7 = EXTRACT(R7, R1.L)(Z); +R7 = EXTRACT(R7, R7.L)(Z); +R1 = EXTRACT(R0, R1.L)(Z); +R2 = EXTRACT(R7, R1.L)(Z); +R3 = EXTRACT(R7, R7.L)(Z); + +//Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/ +R7 = EXTRACT(R0, R1.L)(X); +R7 = EXTRACT(R7, R1.L)(X); +R7 = EXTRACT(R7, R7.L)(X); +R1 = EXTRACT(R0, R1.L)(X); +R2 = EXTRACT(R7, R1.L)(X); +R3 = EXTRACT(R7, R7.L)(X); + +//BITMUX ( Dreg , Dreg , A0 ) (ASR) ; /* shift right, LSB is shifted out (b) */ +BITMUX(R0, R1, A0)(ASR); +BITMUX(R0, R2, A0)(ASR); +BITMUX(R1, R3, A0)(ASR); +//BITMUX(R0, R0, A0)(ASR); + +//BITMUX ( Dreg , Dreg , A0 ) (ASL) ; /* shift left, MSB is shifted out (b) */ +//BITMUX(R0, R0, A0)(ASL); +BITMUX(R0, R1, A0)(ASL); +BITMUX(R1, R2, A0)(ASL); + +//Dreg_lo = ONES Dreg ; /* (b) */ +R0.L = ONES R0; +R0.L = ONES R1; +R1.L = ONES R6; +R2.L = ONES R7; + + diff --git a/gas/testsuite/gas/bfin/cache2.s b/gas/testsuite/gas/bfin/cache2.s index ed4aa266088..afa73651891 100755 --- a/gas/testsuite/gas/bfin/cache2.s +++ b/gas/testsuite/gas/bfin/cache2.s @@ -1,86 +1,86 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//12 CACHE CONTROL -// - -//PREFETCH [ Preg ] ; /* indexed (a) */ -PREFETCH [ P0 ] ; -PREFETCH [ P1 ] ; -PREFETCH [ P2 ] ; -PREFETCH [ P3 ] ; -PREFETCH [ P4 ] ; -PREFETCH [ P5 ] ; -PREFETCH [ SP ] ; -PREFETCH [ FP ] ; - -//PREFETCH [ Preg ++ ] ; /* indexed, post increment (a) */ -PREFETCH [ P0++ ] ; -PREFETCH [ P1++ ] ; -PREFETCH [ P2++ ] ; -PREFETCH [ P3++ ] ; -PREFETCH [ P4++ ] ; -PREFETCH [ P5++ ] ; -PREFETCH [ SP++ ] ; -PREFETCH [ FP++ ] ; - -//FLUSH [ Preg ] ; /* indexed (a) */ -FLUSH [ P0 ] ; -FLUSH [ P1 ] ; -FLUSH [ P2 ] ; -FLUSH [ P3 ] ; -FLUSH [ P4 ] ; -FLUSH [ P5 ] ; -FLUSH [ SP ] ; -FLUSH [ FP ] ; -//FLUSH [ Preg ++ ] ; /* indexed, post increment (a) */ -FLUSH [ P0++ ] ; -FLUSH [ P1++ ] ; -FLUSH [ P2++ ] ; -FLUSH [ P3++ ] ; -FLUSH [ P4++ ] ; -FLUSH [ P5++ ] ; -FLUSH [ SP++ ] ; -FLUSH [ FP++ ] ; - -//FLUSHINV [ Preg ] ; /* indexed (a) */ -FLUSHINV [ P0 ] ; -FLUSHINV [ P1 ] ; -FLUSHINV [ P2 ] ; -FLUSHINV [ P3 ] ; -FLUSHINV [ P4 ] ; -FLUSHINV [ P5 ] ; -FLUSHINV [ SP ] ; -FLUSHINV [ FP ] ; - -//FLUSHINV [ Preg ++ ] ; /* indexed, post increment (a) */ -FLUSHINV [ P0++ ] ; -FLUSHINV [ P1++ ] ; -FLUSHINV [ P2++ ] ; -FLUSHINV [ P3++ ] ; -FLUSHINV [ P4++ ] ; -FLUSHINV [ P5++ ] ; -FLUSHINV [ SP++ ] ; -FLUSHINV [ FP++ ] ; - -//IFLUSH [ Preg ] ; /* indexed (a) */ -IFLUSH [ P0 ] ; -IFLUSH [ P1 ] ; -IFLUSH [ P2 ] ; -IFLUSH [ P3 ] ; -IFLUSH [ P4 ] ; -IFLUSH [ P5 ] ; -IFLUSH [ SP ] ; -IFLUSH [ FP ] ; - -//IFLUSH [ Preg ++ ] ; /* indexed, post increment (a) */ -IFLUSH [ P0++ ] ; -IFLUSH [ P1++ ] ; -IFLUSH [ P2++ ] ; -IFLUSH [ P3++ ] ; -IFLUSH [ P4++ ] ; -IFLUSH [ P5++ ] ; -IFLUSH [ SP++ ] ; -IFLUSH [ FP++ ] ; + +.EXTERN MY_LABEL2; +.section .text; + +// +//12 CACHE CONTROL +// + +//PREFETCH [ Preg ] ; /* indexed (a) */ +PREFETCH [ P0 ] ; +PREFETCH [ P1 ] ; +PREFETCH [ P2 ] ; +PREFETCH [ P3 ] ; +PREFETCH [ P4 ] ; +PREFETCH [ P5 ] ; +PREFETCH [ SP ] ; +PREFETCH [ FP ] ; + +//PREFETCH [ Preg ++ ] ; /* indexed, post increment (a) */ +PREFETCH [ P0++ ] ; +PREFETCH [ P1++ ] ; +PREFETCH [ P2++ ] ; +PREFETCH [ P3++ ] ; +PREFETCH [ P4++ ] ; +PREFETCH [ P5++ ] ; +PREFETCH [ SP++ ] ; +PREFETCH [ FP++ ] ; + +//FLUSH [ Preg ] ; /* indexed (a) */ +FLUSH [ P0 ] ; +FLUSH [ P1 ] ; +FLUSH [ P2 ] ; +FLUSH [ P3 ] ; +FLUSH [ P4 ] ; +FLUSH [ P5 ] ; +FLUSH [ SP ] ; +FLUSH [ FP ] ; +//FLUSH [ Preg ++ ] ; /* indexed, post increment (a) */ +FLUSH [ P0++ ] ; +FLUSH [ P1++ ] ; +FLUSH [ P2++ ] ; +FLUSH [ P3++ ] ; +FLUSH [ P4++ ] ; +FLUSH [ P5++ ] ; +FLUSH [ SP++ ] ; +FLUSH [ FP++ ] ; + +//FLUSHINV [ Preg ] ; /* indexed (a) */ +FLUSHINV [ P0 ] ; +FLUSHINV [ P1 ] ; +FLUSHINV [ P2 ] ; +FLUSHINV [ P3 ] ; +FLUSHINV [ P4 ] ; +FLUSHINV [ P5 ] ; +FLUSHINV [ SP ] ; +FLUSHINV [ FP ] ; + +//FLUSHINV [ Preg ++ ] ; /* indexed, post increment (a) */ +FLUSHINV [ P0++ ] ; +FLUSHINV [ P1++ ] ; +FLUSHINV [ P2++ ] ; +FLUSHINV [ P3++ ] ; +FLUSHINV [ P4++ ] ; +FLUSHINV [ P5++ ] ; +FLUSHINV [ SP++ ] ; +FLUSHINV [ FP++ ] ; + +//IFLUSH [ Preg ] ; /* indexed (a) */ +IFLUSH [ P0 ] ; +IFLUSH [ P1 ] ; +IFLUSH [ P2 ] ; +IFLUSH [ P3 ] ; +IFLUSH [ P4 ] ; +IFLUSH [ P5 ] ; +IFLUSH [ SP ] ; +IFLUSH [ FP ] ; + +//IFLUSH [ Preg ++ ] ; /* indexed, post increment (a) */ +IFLUSH [ P0++ ] ; +IFLUSH [ P1++ ] ; +IFLUSH [ P2++ ] ; +IFLUSH [ P3++ ] ; +IFLUSH [ P4++ ] ; +IFLUSH [ P5++ ] ; +IFLUSH [ SP++ ] ; +IFLUSH [ FP++ ] ; diff --git a/gas/testsuite/gas/bfin/control_code2.s b/gas/testsuite/gas/bfin/control_code2.s index 4633bcc281d..50648cc1f1d 100755 --- a/gas/testsuite/gas/bfin/control_code2.s +++ b/gas/testsuite/gas/bfin/control_code2.s @@ -1,257 +1,257 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//6 CONTROL CODE BIT MANAGEMENT -// - -//CC = Dreg == Dreg ; /* equal, register, signed (a) */ -CC = R7 == R0; -CC = R6 == R1; -CC = R0 == R7; - -//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */ -CC = R7 == -4; -CC = R7 == 3; -CC = R0 == -4; -CC = R0 == 3; - -//CC = Dreg < Dreg ; /* less than, register, signed (a) */ -CC = R7 < R0; -CC = R6 < R0; -CC = R7 < R1; -CC = R1 < R7; -CC = R0 < R6; - -//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */ -CC = R7 < -4; -CC = R6 < -4; -CC = R7 < 3; -CC = R1 < 3; - -//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */ -CC = R7 <= R0; -CC = R6 <= R0; -CC = R7 <= R1; -CC = R1 <= R7; -CC = R0 <= R6; - -//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */ -CC = R7 <= -4; -CC = R6 <= -4; -CC = R7 <= 3; -CC = R1 <= 3; - -//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */ -CC = R7 < R0(IU); -CC = R6 < R0(IU); -CC = R7 < R1(IU); -CC = R1 < R7(IU); -CC = R0 < R6(IU); - -//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */ -CC = R7 < 0(IU); -CC = R6 < 0(IU); -CC = R7 < 7(IU); -CC = R1 < 7(IU); -//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */ -CC = R7 <= R0(IU); -CC = R6 <= R0(IU); -CC = R7 <= R1(IU); -CC = R1 <= R7(IU); -CC = R0 <= R6(IU); - - -//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */ -CC = R7 <= 0(IU); -CC = R6 <= 0(IU); -CC = R7 <= 7(IU); -CC = R1 <= 7(IU); - -//CC = Preg == Preg ; /* equal, register, signed (a) */ -CC = P5 == P0; -CC = P5 == P1; -CC = P0 == P2; -CC = P3 == P5; - -//CC = Preg == imm3 ; /* equal, immediate, signed (a) */ -CC = P5 == -4; -CC = P5 == 0; -CC = P5 == 3; -CC = P2 == -4; -CC = P2 == 0; -CC = P2 == 3; - -//CC = Preg < Preg ; /* less than, register, signed (a) */ -CC = P5 < P0; -CC = P5 < P1; -CC = P0 < P2; -CC = P3 < P5; - -//CC = Preg < imm3 ; /* less than, immediate, signed (a) */ -CC = P5 < -4; -CC = P5 < 0; -CC = P5 < 3; -CC = P2 < -4; -CC = P2 < 0; -CC = P2 < 3; - - -//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */ -CC = P5 <= P0; -CC = P5 <= P1; -CC = P0 <= P2; -CC = P3 <= P5; - -//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */ -CC = P5 <= -4; -CC = P5 <= 0; -CC = P5 <= 3; -CC = P2 <= -4; -CC = P2 <= 0; -CC = P2 <= 3; - -//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */ -CC = P5 < P0(IU); -CC = P5 < P1(IU); -CC = P0 < P2(IU); -CC = P3 < P5(IU); - -//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */ -CC = P5 < 0(IU); -CC = P5 < 7(IU); -CC = P2 < 0(IU); -CC = P2 < 7(IU); - -//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */ -CC = P5 <= P0(IU); -CC = P5 <= P1(IU); -CC = P0 <= P2(IU); -CC = P3 <= P5(IU); - -//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */ -CC = P5 <= 0(IU); -CC = P5 <= 7(IU); -CC = P2 <= 0(IU); -CC = P2 <= 7(IU); - -CC = A0 == A1 ; /* equal, signed (a) */ -CC = A0 < A1 ; /* less than, Accumulator, signed (a) */ -CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */ - -//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */ -R7 = CC; -R0 = CC; - -//statbit = CC ; /* status bit equals CC (a) */ -AZ = CC; -AN = CC; -AC0= CC; -AC1= CC; -//V = CC; -VS = CC; -AV0= CC; -AV0S= CC; -AV1 = CC; -AV1S= CC; -AQ = CC; -//statbit |= CC ; /* status bit equals status bit OR CC (a) */ -AZ |= CC; -AN |= CC; -AC0|= CC; -AC1|= CC; -//V |= CC; -VS |= CC; -AV0|= CC; -AV0S|= CC; -AV1 |= CC; -AV1S|= CC; -AQ |= CC; - -//statbit &= CC ; /* status bit equals status bit AND CC (a) */ -AZ &= CC; -AN &= CC; -AC0&= CC; -AC1&= CC; -//V &= CC; -VS &= CC; -AV0&= CC; -AV0S&= CC; -AV1 &= CC; -AV1S&= CC; -AQ &= CC; - -//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */ - -AZ ^= CC; -AN ^= CC; -AC0^= CC; -AC1^= CC; -//V ^= CC; -VS ^= CC; -AV0^= CC; -AV0S^= CC; -AV1 ^= CC; -AV1S^= CC; -AQ ^= CC; -//CC = Dreg ; /* CC set if the register is non-zero (a) */ -CC = R7; -CC = R6; -CC = R1; -CC = R0; - - -//CC = statbit ; /* CC equals status bit (a) */ -CC = AZ; -CC = AN; -CC = AC0; -CC = AC1; -//CC = V; -CC = VS; -CC = AV0; -CC = AV0S; -CC = AV1; -CC = AV1S; -CC = AQ; - -//CC |= statbit ; /* CC equals CC OR status bit (a) */ -CC |= AZ; -CC |= AN; -CC |= AC0; -CC |= AC1; -//CC |= V; -CC |= VS; -CC |= AV0; -CC |= AV0S; -CC |= AV1; -CC |= AV1S; -CC |= AQ; - -//CC &= statbit ; /* CC equals CC AND status bit (a) */ -CC &= AZ; -CC &= AN; -CC &= AC0; -CC &= AC1; -//CC &= V; -CC &= VS; -CC &= AV0; -CC &= AV0S; -CC &= AV1; -CC &= AV1S; -CC &= AQ; - -//CC ^= statbit ; /* CC equals CC XOR status bit (a) */ -CC ^= AZ; -CC ^= AN; -CC ^= AC0; -CC ^= AC1; -//CC ^= V; -CC ^= VS; -CC ^= AV0; -CC ^= AV0S; -CC ^= AV1; -CC ^= AV1S; -CC ^= AQ; - -CC = ! CC ; /* (a) */ + +.EXTERN MY_LABEL2; +.section .text; + +// +//6 CONTROL CODE BIT MANAGEMENT +// + +//CC = Dreg == Dreg ; /* equal, register, signed (a) */ +CC = R7 == R0; +CC = R6 == R1; +CC = R0 == R7; + +//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */ +CC = R7 == -4; +CC = R7 == 3; +CC = R0 == -4; +CC = R0 == 3; + +//CC = Dreg < Dreg ; /* less than, register, signed (a) */ +CC = R7 < R0; +CC = R6 < R0; +CC = R7 < R1; +CC = R1 < R7; +CC = R0 < R6; + +//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */ +CC = R7 < -4; +CC = R6 < -4; +CC = R7 < 3; +CC = R1 < 3; + +//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */ +CC = R7 <= R0; +CC = R6 <= R0; +CC = R7 <= R1; +CC = R1 <= R7; +CC = R0 <= R6; + +//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */ +CC = R7 <= -4; +CC = R6 <= -4; +CC = R7 <= 3; +CC = R1 <= 3; + +//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */ +CC = R7 < R0(IU); +CC = R6 < R0(IU); +CC = R7 < R1(IU); +CC = R1 < R7(IU); +CC = R0 < R6(IU); + +//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */ +CC = R7 < 0(IU); +CC = R6 < 0(IU); +CC = R7 < 7(IU); +CC = R1 < 7(IU); +//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */ +CC = R7 <= R0(IU); +CC = R6 <= R0(IU); +CC = R7 <= R1(IU); +CC = R1 <= R7(IU); +CC = R0 <= R6(IU); + + +//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */ +CC = R7 <= 0(IU); +CC = R6 <= 0(IU); +CC = R7 <= 7(IU); +CC = R1 <= 7(IU); + +//CC = Preg == Preg ; /* equal, register, signed (a) */ +CC = P5 == P0; +CC = P5 == P1; +CC = P0 == P2; +CC = P3 == P5; + +//CC = Preg == imm3 ; /* equal, immediate, signed (a) */ +CC = P5 == -4; +CC = P5 == 0; +CC = P5 == 3; +CC = P2 == -4; +CC = P2 == 0; +CC = P2 == 3; + +//CC = Preg < Preg ; /* less than, register, signed (a) */ +CC = P5 < P0; +CC = P5 < P1; +CC = P0 < P2; +CC = P3 < P5; + +//CC = Preg < imm3 ; /* less than, immediate, signed (a) */ +CC = P5 < -4; +CC = P5 < 0; +CC = P5 < 3; +CC = P2 < -4; +CC = P2 < 0; +CC = P2 < 3; + + +//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */ +CC = P5 <= P0; +CC = P5 <= P1; +CC = P0 <= P2; +CC = P3 <= P5; + +//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */ +CC = P5 <= -4; +CC = P5 <= 0; +CC = P5 <= 3; +CC = P2 <= -4; +CC = P2 <= 0; +CC = P2 <= 3; + +//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */ +CC = P5 < P0(IU); +CC = P5 < P1(IU); +CC = P0 < P2(IU); +CC = P3 < P5(IU); + +//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */ +CC = P5 < 0(IU); +CC = P5 < 7(IU); +CC = P2 < 0(IU); +CC = P2 < 7(IU); + +//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */ +CC = P5 <= P0(IU); +CC = P5 <= P1(IU); +CC = P0 <= P2(IU); +CC = P3 <= P5(IU); + +//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */ +CC = P5 <= 0(IU); +CC = P5 <= 7(IU); +CC = P2 <= 0(IU); +CC = P2 <= 7(IU); + +CC = A0 == A1 ; /* equal, signed (a) */ +CC = A0 < A1 ; /* less than, Accumulator, signed (a) */ +CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */ + +//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */ +R7 = CC; +R0 = CC; + +//statbit = CC ; /* status bit equals CC (a) */ +AZ = CC; +AN = CC; +AC0= CC; +AC1= CC; +//V = CC; +VS = CC; +AV0= CC; +AV0S= CC; +AV1 = CC; +AV1S= CC; +AQ = CC; +//statbit |= CC ; /* status bit equals status bit OR CC (a) */ +AZ |= CC; +AN |= CC; +AC0|= CC; +AC1|= CC; +//V |= CC; +VS |= CC; +AV0|= CC; +AV0S|= CC; +AV1 |= CC; +AV1S|= CC; +AQ |= CC; + +//statbit &= CC ; /* status bit equals status bit AND CC (a) */ +AZ &= CC; +AN &= CC; +AC0&= CC; +AC1&= CC; +//V &= CC; +VS &= CC; +AV0&= CC; +AV0S&= CC; +AV1 &= CC; +AV1S&= CC; +AQ &= CC; + +//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */ + +AZ ^= CC; +AN ^= CC; +AC0^= CC; +AC1^= CC; +//V ^= CC; +VS ^= CC; +AV0^= CC; +AV0S^= CC; +AV1 ^= CC; +AV1S^= CC; +AQ ^= CC; +//CC = Dreg ; /* CC set if the register is non-zero (a) */ +CC = R7; +CC = R6; +CC = R1; +CC = R0; + + +//CC = statbit ; /* CC equals status bit (a) */ +CC = AZ; +CC = AN; +CC = AC0; +CC = AC1; +//CC = V; +CC = VS; +CC = AV0; +CC = AV0S; +CC = AV1; +CC = AV1S; +CC = AQ; + +//CC |= statbit ; /* CC equals CC OR status bit (a) */ +CC |= AZ; +CC |= AN; +CC |= AC0; +CC |= AC1; +//CC |= V; +CC |= VS; +CC |= AV0; +CC |= AV0S; +CC |= AV1; +CC |= AV1S; +CC |= AQ; + +//CC &= statbit ; /* CC equals CC AND status bit (a) */ +CC &= AZ; +CC &= AN; +CC &= AC0; +CC &= AC1; +//CC &= V; +CC &= VS; +CC &= AV0; +CC &= AV0S; +CC &= AV1; +CC &= AV1S; +CC &= AQ; + +//CC ^= statbit ; /* CC equals CC XOR status bit (a) */ +CC ^= AZ; +CC ^= AN; +CC ^= AC0; +CC ^= AC1; +//CC ^= V; +CC ^= VS; +CC ^= AV0; +CC ^= AV0S; +CC ^= AV1; +CC ^= AV1S; +CC ^= AQ; + +CC = ! CC ; /* (a) */ diff --git a/gas/testsuite/gas/bfin/event2.s b/gas/testsuite/gas/bfin/event2.s index c0a6fc36557..a8b0ec103a0 100755 --- a/gas/testsuite/gas/bfin/event2.s +++ b/gas/testsuite/gas/bfin/event2.s @@ -1,41 +1,41 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//11 EXTERNAL EVENT MANAGEMENT -// -IDLE ; /* (a) */ -CSYNC ; /* (a) */ -SSYNC ; /* (a) */ -EMUEXCPT ; /* (a) */ - -//CLI Dreg ; /* previous state of IMASK moved to Dreg (a) */ -CLI R0; -CLI R1; -CLI R2; - -//STI Dreg ; /* previous state of IMASK restored from Dreg (a) */ -STI R0; -STI R1; -STI R2; - -//RAISE uimm4 ; /* (a) */ -RAISE 0; -RAISE 4; -RAISE 15; - -//EXCPT uimm4 ; /* (a) */ -EXCPT 0; -EXCPT 1; -EXCPT 15; - -//TESTSET ( Preg ) ; /* (a) */ -TESTSET (P0); -TESTSET (P1); -TESTSET (P2); -//TESTSET (SP); -//TESTSET (FP); - -NOP ; /* (a) */ -MNOP ; /* (b) */ + +.EXTERN MY_LABEL2; +.section .text; + +// +//11 EXTERNAL EVENT MANAGEMENT +// +IDLE ; /* (a) */ +CSYNC ; /* (a) */ +SSYNC ; /* (a) */ +EMUEXCPT ; /* (a) */ + +//CLI Dreg ; /* previous state of IMASK moved to Dreg (a) */ +CLI R0; +CLI R1; +CLI R2; + +//STI Dreg ; /* previous state of IMASK restored from Dreg (a) */ +STI R0; +STI R1; +STI R2; + +//RAISE uimm4 ; /* (a) */ +RAISE 0; +RAISE 4; +RAISE 15; + +//EXCPT uimm4 ; /* (a) */ +EXCPT 0; +EXCPT 1; +EXCPT 15; + +//TESTSET ( Preg ) ; /* (a) */ +TESTSET (P0); +TESTSET (P1); +TESTSET (P2); +//TESTSET (SP); +//TESTSET (FP); + +NOP ; /* (a) */ +MNOP ; /* (b) */ diff --git a/gas/testsuite/gas/bfin/logical2.s b/gas/testsuite/gas/bfin/logical2.s index b26a765cfd5..d9b62747ea2 100755 --- a/gas/testsuite/gas/bfin/logical2.s +++ b/gas/testsuite/gas/bfin/logical2.s @@ -1,69 +1,69 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//7 LOGICAL OPERATIONS -// - -//Dreg = Dreg & Dreg ; /* (a) */ - -R7 = R7 & R7; -R7 = R7 & R0; -r7 = R7 & R1; - -R1 = R7 & R7; -R2 = R7 & R0; -r3 = R7 & R1; - -//Dreg = ~ Dreg ; /* (a)*/ - -R7 = ~R7; -R7 = ~R0; -R0 = ~R7; -R0 = ~R2; - -//Dreg = Dreg | Dreg ; /* (a) */ - -R7 = R7 | R7; -R7 = R7 | R1; -R7 = R7 | R0; - -R1 = R7 | R7; -R2 = R7 | R1; -R3 = R7 | R0; - -//Dreg = Dreg ^ Dreg ; /* (a) */ - -R7 = R7 ^ R7; -R7 = R7 ^ R1; -R7 = R7 ^ R0; - -R1 = R7 ^ R7; -R2 = R7 ^ R1; -R3 = R7 ^ R0; - -//Dreg_lo = CC = BXORSHIFT ( A0, Dreg ) ; /* (b) */ -R0.L = CC = BXORSHIFT(A0, R0); -R0.L = CC = BXORSHIFT(A0, R1); - -R3.L = CC = BXORSHIFT(A0, R0); -R3.L = CC = BXORSHIFT(A0, R1); - -//Dreg_lo = CC = BXOR ( A0, Dreg ) ; /* (b) */ -R0.L = CC = BXOR(A0, R0); -R0.L = CC = BXOR(A0, R1); - -R3.L = CC = BXOR(A0, R0); -R3.L = CC = BXOR(A0, R1); - -//Dreg_lo = CC = BXOR ( A0, A1, CC ) ; /* (b) */ -R0.L = CC = BXOR(A0, A1, CC); -R0.L = CC = BXOR(A0, A1, CC); - -R3.L = CC = BXOR(A0, A1, CC); -R3.L = CC = BXOR(A0, A1, CC); - -A0 = BXORSHIFT ( A0, A1, CC ) ; /* (b) */ - - + +.EXTERN MY_LABEL2; +.section .text; + +// +//7 LOGICAL OPERATIONS +// + +//Dreg = Dreg & Dreg ; /* (a) */ + +R7 = R7 & R7; +R7 = R7 & R0; +r7 = R7 & R1; + +R1 = R7 & R7; +R2 = R7 & R0; +r3 = R7 & R1; + +//Dreg = ~ Dreg ; /* (a)*/ + +R7 = ~R7; +R7 = ~R0; +R0 = ~R7; +R0 = ~R2; + +//Dreg = Dreg | Dreg ; /* (a) */ + +R7 = R7 | R7; +R7 = R7 | R1; +R7 = R7 | R0; + +R1 = R7 | R7; +R2 = R7 | R1; +R3 = R7 | R0; + +//Dreg = Dreg ^ Dreg ; /* (a) */ + +R7 = R7 ^ R7; +R7 = R7 ^ R1; +R7 = R7 ^ R0; + +R1 = R7 ^ R7; +R2 = R7 ^ R1; +R3 = R7 ^ R0; + +//Dreg_lo = CC = BXORSHIFT ( A0, Dreg ) ; /* (b) */ +R0.L = CC = BXORSHIFT(A0, R0); +R0.L = CC = BXORSHIFT(A0, R1); + +R3.L = CC = BXORSHIFT(A0, R0); +R3.L = CC = BXORSHIFT(A0, R1); + +//Dreg_lo = CC = BXOR ( A0, Dreg ) ; /* (b) */ +R0.L = CC = BXOR(A0, R0); +R0.L = CC = BXOR(A0, R1); + +R3.L = CC = BXOR(A0, R0); +R3.L = CC = BXOR(A0, R1); + +//Dreg_lo = CC = BXOR ( A0, A1, CC ) ; /* (b) */ +R0.L = CC = BXOR(A0, A1, CC); +R0.L = CC = BXOR(A0, A1, CC); + +R3.L = CC = BXOR(A0, A1, CC); +R3.L = CC = BXOR(A0, A1, CC); + +A0 = BXORSHIFT ( A0, A1, CC ) ; /* (b) */ + + diff --git a/gas/testsuite/gas/bfin/move2.s b/gas/testsuite/gas/bfin/move2.s index 1036900f3b6..ac8ae8db04a 100755 --- a/gas/testsuite/gas/bfin/move2.s +++ b/gas/testsuite/gas/bfin/move2.s @@ -1,530 +1,530 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//4 MOVE -// - -//genreg = genreg ; /* (a) */ -R0 = R0; -R1 = R1; -R2 = R2; -R3 = R3; -R4 = R4; -R5 = R5; -R6 = R6; -R7 = R7; - -P0 = P0; -P1 = P1; -P2 = P2; -P3 = P3; -P4 = P4; -P5 = P5; -SP = SP; -FP = FP; - -A0.X = A0.X; -A0.W = A0.W; -A1.X = A1.X; -A1.W = A1.W; - - -R0 = A1.W; -R1 = A1.X; -R2 = A0.W; -R3 = A0.X; -R4 = FP; -R5 = SP; -R6 = P5; -R7 = P4; - -P0 = P3; -P1 = P2; -P2 = P1; -P3 = P0; -P4 = R7; -P5 = R6; -SP = R5; -FP = R4; - -A0.X = R3; -A0.W = R2; -A1.X = R1; -A1.W = R0; - -A0.X = A0.W; -A0.X = A1.W; -A0.X = A1.X; - -A1.X = A1.W; -A1.X = A0.W; -A1.X = A0.X; - -A0.W = A0.W; -A0.W = A1.W; -A0.W = A1.X; - -A1.W = A1.W; -A1.W = A0.W; -A1.W = A0.X; - -//genreg = dagreg ; /* (a) */ -R0 = I0; -R1 = I1; -R2 = I2; -R3 = I3; -R4 = M0; -R5 = M1; -R6 = M2; -R7 = M3; - -R0 = B0; -R1 = B1; -R2 = B2; -R3 = B3; -R4 = L0; -R5 = L1; -R6 = L2; -R7 = L3; - -P0 = I0; -P1 = I1; -P2 = I2; -P3 = I3; -P4 = M0; -P5 = M1; -SP = M2; -FP = M3; - -P0 = B0; -P1 = B1; -P2 = B2; -P3 = B3; -P4 = L0; -P5 = L1; -SP = L2; -FP = L3; - - -A0.X = I0; -A0.W = I1; -A1.X = I2; -A1.W = I3; - -A0.X = M0; -A0.W = M1; -A1.X = M2; -A1.W = M3; - -A0.X = B0; -A0.W = B1; -A1.X = B2; -A1.W = B3; - -A0.X = L0; -A0.W = L1; -A1.X = L2; -A1.W = L3; - -//dagreg = genreg ; /* (a) */ -I0 = R0; -I1 = P0; -I2 = SP; -I3 = FP; -I0 = A0.X; -I1 = A0.W; -I2 = A1.X; -I3 = A1.W; - -M0 = R0; -M1 = P0; -M2 = SP; -M3 = FP; -M0 = A0.X; -M1 = A0.W; -M2 = A1.X; -M3 = A1.W; - -B0 = R0; -B1 = P0; -B2 = SP; -B3 = FP; -B0 = A0.X; -B1 = A0.W; -B2 = A1.X; -B3 = A1.W; - -L0 = R0; -L1 = P0; -L2 = SP; -L3 = FP; -L0 = A0.X; -L1 = A0.W; -L2 = A1.X; -L3 = A1.W; - - -//dagreg = dagreg ; /* (a) */ - -I0 = I1; -I1 = M0; -I2 = B1; -I3 = L0; - -M0 = I1; -M1 = M0; -M2 = B1; -M3 = L0; - -B0 = I1; -B1 = M0; -B2 = B1; -B3 = L0; - -L0 = I1; -L1 = M0; -L2 = B1; -L3 = L0; - -//genreg = USP ; /* (a)*/ -R1 = USP; -P2 = USP; -SP = USP; -FP = USP; -A0.X = USP; -A1.W = USP; - -//USP = genreg ; /* (a)*/ -USP = R2; -USP = P4; -USP = SP; -USP = FP; -USP = A0.X; -USP = A1.W; - -//Dreg = sysreg ; /* sysreg to 32-bit D-register (a) */ -R0 = ASTAT; -R1 = SEQSTAT; -R2 = SYSCFG; -R3 = RETI; -R4 = RETX; -R5 = RETN; -R6 = RETE; -R7 = RETS; -R0 = LC0; -R1 = LC1; -R2 = LT0; -R3 = LT1; -R4 = LB0; -R5 = LB1; -R6 = CYCLES; -R7 = CYCLES2; -//R0 = EMUDAT; -//sysreg = Dreg ; /* 32-bit D-register to sysreg (a) */ -ASTAT = R0; -SEQSTAT = R1; -SYSCFG = R3; -RETI = R4; -RETX =R5; -RETN = R6; -RETE = R7; -RETS = R0; -LC0 = R1; -LC1 = R2; -LT0 = R3; -LT1 = R4; -LB0 = R5; -LB1 = R6; -CYCLES = R7; -CYCLES2 = R0; -//EMUDAT = R1; -//sysreg = Preg ; /* 32-bit P-register to sysreg (a) */ -ASTAT = P0; -SEQSTAT = P1; -SYSCFG = P3; -RETI = P4; -RETX =P5; -RETN = SP; -RETE = FP; -RETS = P0; -LC0 = P1; -LC1 = P2; -LT0 = P3; -LT1 = P4; -LB0 = P5; -LB1 = SP; -CYCLES = SP; -CYCLES2 = P0; -//EMUDAT = P1; - - -//sysreg = USP ; /* (a) */ -//ASTAT = USP; -//SEQSTAT = USP; -//SYSCFG = USP; -//RETI = USP; -//RETX =USP; -//RETN = USP; -//RETE = USP; -//RETS = USP; -//LC0 = USP; -//LC1 = USP; -//LT0 = USP; -//LT1 = USP; -//LB0 = USP; -//LB1 = USP; -//CYCLES = USP; -//CYCLES2 = USP; -//EMUDAT = USP; - -A0 = A1 ; /* move 40-bit Accumulator value (b) */ - -A1 = A0 ; /* move 40-bit Accumulator value (b) */ - -//A0 = Dreg ; /* 32-bit D-register to 40-bit A0, sign extended (b)*/ -A0 = R0; -A0 = R1; -A0 = R2; - -//A1 = Dreg ; /* 32-bit D-register to 40-bit A1, sign extended (b)*/ - -A1 = R0; -A1 = R1; -A1 = R2; -//Dreg_even = A0 (opt_mode) ; /* move 32-bit A0.W to even Dreg (b) */ -R0 = A0; -R2 = A0(FU); -R4 = A0(ISS2); - -//Dreg_odd = A1 (opt_mode) ; /* move 32-bit A1.W to odd Dreg (b) */ -R1 = A1; -R3 = A1(FU); -R5 = A1(ISS2); - -//Dreg_even = A0, Dreg_odd = A1 (opt_mode) ; /* move both Accumulators to a register pair (b) */ -R0 = A0, R1 = A1; -R0 = A0, R1 = A1(FU); -R6 = A0, R7 = A1(ISS2); - - -//Dreg_odd = A1, Dreg_even = A0 (opt_mode) ; /* move both Accumulators to a register pair (b) */ -R1 = A1, R0 = A0; -R3 = A1, R2 = A0(FU); -R5 = A1, R4 = A0(ISS2); - -//IF CC DPreg = DPreg ; /* move if CC = 1 (a) */ - -IF CC R3 = R0; -IF CC R2 = R0; -IF CC R7 = R0; - -IF CC R2 = P2; -IF CC R4 = P1; -IF CC R0 = P0; -IF CC R7 = P4; - -IF CC P0 = P2; -IF CC P4 = P5; -IF CC P1 = P3; -IF CC P5 = P4; - -IF CC P0 = R2; -IF CC P4 = R3; -IF CC P5 = R7; -IF CC P2 = R6; - -//IF ! CC DPreg = DPreg ; /* move if CC = 0 (a) */ -IF !CC R3 = R0; -IF !CC R2 = R0; -IF !CC R7 = R0; - -IF !CC R2 = P2; -IF !CC R4 = P1; -IF !CC R0 = P0; -IF !CC R7 = P4; - -IF !CC P0 = P2; -IF !CC P4 = P5; -IF !CC P1 = P3; -IF !CC P5 = P4; - -IF !CC P0 = R2; -IF !CC P4 = R3; -IF !CC P5 = R7; -IF !CC P2 = R6; - -//Dreg = Dreg_lo (Z) ; /* (a) */ - -R0 = R0.L(Z); -R2 = R1.L(Z); -R1 = R2.L(Z); -R7 = R6.L(Z); - -//Dreg = Dreg_lo (X) ; /* (a)*/ -R0 = R0.L(X); -R2 = R1.L(X); -R1 = R2.L(X); -R7 = R6.L(X); - -R0 = R0.L; -R2 = R1.L; -R1 = R2.L; -R7 = R6.L; - -//A0.X = Dreg_lo ; /* least significant 8 bits of Dreg into A0.X (b) */ -A0.X = R0.L; -A0.X = R1.L; - -//A1.X = Dreg_lo ; /* least significant 8 bits of Dreg into A1.X (b) */ -A1.X = R0.L; -A1.X = R1.L; - -//Dreg_lo = A0.X ; /* 8-bit A0.X, sign-extended, into least significant 16 bits of Dreg (b) */ -R0.L = A0.X; -R1.L = A0.X; -R7.L = A0.X; - -//Dreg_lo = A1.X ; /* 8-bit A1.X, sign-extended, into least significant 16 bits of Dreg (b) */ -R0.L = A1.X; -R1.L = A1.X; -R7.L = A1.X; - -//A0.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A0.W (b) */ -A0.L = R0.L; -A0.L = R1.L; -A0.L = R6.L; - -//A1.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A1.W (b) */ -A1.L = R0.L; -A1.L = R1.L; -A1.L = R6.L; - -//A0.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A0.W (b) */ -A0.H = R0.H; -A0.H = R1.H; -A0.H = R6.H; -//A1.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A1.W (b) */ -A1.H = R0.H; -A1.H = R1.H; -A1.H = R6.H; - -//Dreg_lo = A0 (opt_mode) ; /* move A0 to lower half of Dreg (b) */ -R0.L = A0; -R1.L = A0; - -R0.L = A0(FU); -R1.L = A0(FU); - -R0.L = A0(IS); -R1.L = A0(IS); - -R0.L = A0(IU); -R1.L = A0(IU); - -R0.L = A0(T); -R1.L = A0(T); - -R0.L = A0(S2RND); -R1.L = A0(S2RND); - -R0.L = A0(ISS2); -R1.L = A0(ISS2); - -R0.L = A0(IH); -R1.L = A0(IH); - -//Dreg_hi = A1 (opt_mode) ; /* move A1 to upper half of Dreg (b) */ -R0.H = A1; -R1.H = A1; - -R0.H = A1(FU); -R1.H = A1(FU); - -R0.H = A1(IS); -R1.H = A1(IS); - -R0.H = A1(IU); -R1.H = A1(IU); - -R0.H = A1(T); -R1.H = A1(T); - -R0.H = A1(S2RND); -R1.H = A1(S2RND); - -R0.H = A1(ISS2); -R1.H = A1(ISS2); - -R0.H = A1(IH); -R1.H = A1(IH); - - -//Dreg_lo = A0, Dreg_hi = A1 (opt_mode) ; /* move both values at once; must go to the lower and upper halves of the same Dreg (b)*/ - -R0.L = A0, R0.H = A1; -R1.L = A0, R1.H = A1; - -R0.L = A0, R0.H = A1(FU); -R1.L = A0, R1.H = A1(FU); - -R0.L = A0, R0.H = A1(IS); -R1.L = A0, R1.H = A1(IS); - -R0.L = A0, R0.H = A1(IU); -R1.L = A0, R1.H = A1(IU); - -R0.L = A0, R0.H = A1(T); -R1.L = A0, R1.H = A1(T); - -R0.L = A0, R0.H = A1(S2RND); -R1.L = A0, R1.H = A1(S2RND); - -R0.L = A0, R0.H = A1(ISS2); -R1.L = A0, R1.H = A1(ISS2); - -R0.L = A0, R0.H = A1(IH); -R1.L = A0, R1.H = A1(IH); - -//Dreg_hi = A1, Dreg_lo = AO (opt_mode) ; /* move both values at once; must go to the upper and lower halves of the same Dreg (b) */ - -R0.H = A1,R0.L = A0; -R1.H = A1,R1.L = A0; - -R0.H = A1,R0.L = A0 (FU); -R1.H = A1,R1.L = A0 (FU); - -R0.H = A1,R0.L = A0 (IS); -R1.H = A1,R1.L = A0 (IS); - -R0.H = A1,R0.L = A0 (IU); -R1.H = A1,R1.L = A0 (IU); - -R0.H = A1,R0.L = A0 (T); -R1.H = A1,R1.L = A0 (T); - -R0.H = A1,R0.L = A0 (S2RND); -R1.H = A1,R1.L = A0 (S2RND); - -R0.H = A1,R0.L = A0 (ISS2); -R1.H = A1,R1.L = A0 (ISS2); - -R0.H = A1,R0.L = A0 (IH); -R1.H = A1,R1.L = A0 (IH); - -//Dreg = Dreg_byte (Z) ; /* (a)*/ - -R0 = R1.B(Z); -R0 = R2.B(Z); - -R7 = R1.B(Z); -R7 = R2.B(Z); - -//Dreg = Dreg_byte (X) ; /* (a) */ -R0 = R1.B(X); -R0 = R2.B(X); - -R7 = R1.B(X); -R7 = R2.B(X); - + +.EXTERN MY_LABEL2; +.section .text; + +// +//4 MOVE +// + +//genreg = genreg ; /* (a) */ +R0 = R0; +R1 = R1; +R2 = R2; +R3 = R3; +R4 = R4; +R5 = R5; +R6 = R6; +R7 = R7; + +P0 = P0; +P1 = P1; +P2 = P2; +P3 = P3; +P4 = P4; +P5 = P5; +SP = SP; +FP = FP; + +A0.X = A0.X; +A0.W = A0.W; +A1.X = A1.X; +A1.W = A1.W; + + +R0 = A1.W; +R1 = A1.X; +R2 = A0.W; +R3 = A0.X; +R4 = FP; +R5 = SP; +R6 = P5; +R7 = P4; + +P0 = P3; +P1 = P2; +P2 = P1; +P3 = P0; +P4 = R7; +P5 = R6; +SP = R5; +FP = R4; + +A0.X = R3; +A0.W = R2; +A1.X = R1; +A1.W = R0; + +A0.X = A0.W; +A0.X = A1.W; +A0.X = A1.X; + +A1.X = A1.W; +A1.X = A0.W; +A1.X = A0.X; + +A0.W = A0.W; +A0.W = A1.W; +A0.W = A1.X; + +A1.W = A1.W; +A1.W = A0.W; +A1.W = A0.X; + +//genreg = dagreg ; /* (a) */ +R0 = I0; +R1 = I1; +R2 = I2; +R3 = I3; +R4 = M0; +R5 = M1; +R6 = M2; +R7 = M3; + +R0 = B0; +R1 = B1; +R2 = B2; +R3 = B3; +R4 = L0; +R5 = L1; +R6 = L2; +R7 = L3; + +P0 = I0; +P1 = I1; +P2 = I2; +P3 = I3; +P4 = M0; +P5 = M1; +SP = M2; +FP = M3; + +P0 = B0; +P1 = B1; +P2 = B2; +P3 = B3; +P4 = L0; +P5 = L1; +SP = L2; +FP = L3; + + +A0.X = I0; +A0.W = I1; +A1.X = I2; +A1.W = I3; + +A0.X = M0; +A0.W = M1; +A1.X = M2; +A1.W = M3; + +A0.X = B0; +A0.W = B1; +A1.X = B2; +A1.W = B3; + +A0.X = L0; +A0.W = L1; +A1.X = L2; +A1.W = L3; + +//dagreg = genreg ; /* (a) */ +I0 = R0; +I1 = P0; +I2 = SP; +I3 = FP; +I0 = A0.X; +I1 = A0.W; +I2 = A1.X; +I3 = A1.W; + +M0 = R0; +M1 = P0; +M2 = SP; +M3 = FP; +M0 = A0.X; +M1 = A0.W; +M2 = A1.X; +M3 = A1.W; + +B0 = R0; +B1 = P0; +B2 = SP; +B3 = FP; +B0 = A0.X; +B1 = A0.W; +B2 = A1.X; +B3 = A1.W; + +L0 = R0; +L1 = P0; +L2 = SP; +L3 = FP; +L0 = A0.X; +L1 = A0.W; +L2 = A1.X; +L3 = A1.W; + + +//dagreg = dagreg ; /* (a) */ + +I0 = I1; +I1 = M0; +I2 = B1; +I3 = L0; + +M0 = I1; +M1 = M0; +M2 = B1; +M3 = L0; + +B0 = I1; +B1 = M0; +B2 = B1; +B3 = L0; + +L0 = I1; +L1 = M0; +L2 = B1; +L3 = L0; + +//genreg = USP ; /* (a)*/ +R1 = USP; +P2 = USP; +SP = USP; +FP = USP; +A0.X = USP; +A1.W = USP; + +//USP = genreg ; /* (a)*/ +USP = R2; +USP = P4; +USP = SP; +USP = FP; +USP = A0.X; +USP = A1.W; + +//Dreg = sysreg ; /* sysreg to 32-bit D-register (a) */ +R0 = ASTAT; +R1 = SEQSTAT; +R2 = SYSCFG; +R3 = RETI; +R4 = RETX; +R5 = RETN; +R6 = RETE; +R7 = RETS; +R0 = LC0; +R1 = LC1; +R2 = LT0; +R3 = LT1; +R4 = LB0; +R5 = LB1; +R6 = CYCLES; +R7 = CYCLES2; +//R0 = EMUDAT; +//sysreg = Dreg ; /* 32-bit D-register to sysreg (a) */ +ASTAT = R0; +SEQSTAT = R1; +SYSCFG = R3; +RETI = R4; +RETX =R5; +RETN = R6; +RETE = R7; +RETS = R0; +LC0 = R1; +LC1 = R2; +LT0 = R3; +LT1 = R4; +LB0 = R5; +LB1 = R6; +CYCLES = R7; +CYCLES2 = R0; +//EMUDAT = R1; +//sysreg = Preg ; /* 32-bit P-register to sysreg (a) */ +ASTAT = P0; +SEQSTAT = P1; +SYSCFG = P3; +RETI = P4; +RETX =P5; +RETN = SP; +RETE = FP; +RETS = P0; +LC0 = P1; +LC1 = P2; +LT0 = P3; +LT1 = P4; +LB0 = P5; +LB1 = SP; +CYCLES = SP; +CYCLES2 = P0; +//EMUDAT = P1; + + +//sysreg = USP ; /* (a) */ +//ASTAT = USP; +//SEQSTAT = USP; +//SYSCFG = USP; +//RETI = USP; +//RETX =USP; +//RETN = USP; +//RETE = USP; +//RETS = USP; +//LC0 = USP; +//LC1 = USP; +//LT0 = USP; +//LT1 = USP; +//LB0 = USP; +//LB1 = USP; +//CYCLES = USP; +//CYCLES2 = USP; +//EMUDAT = USP; + +A0 = A1 ; /* move 40-bit Accumulator value (b) */ + +A1 = A0 ; /* move 40-bit Accumulator value (b) */ + +//A0 = Dreg ; /* 32-bit D-register to 40-bit A0, sign extended (b)*/ +A0 = R0; +A0 = R1; +A0 = R2; + +//A1 = Dreg ; /* 32-bit D-register to 40-bit A1, sign extended (b)*/ + +A1 = R0; +A1 = R1; +A1 = R2; +//Dreg_even = A0 (opt_mode) ; /* move 32-bit A0.W to even Dreg (b) */ +R0 = A0; +R2 = A0(FU); +R4 = A0(ISS2); + +//Dreg_odd = A1 (opt_mode) ; /* move 32-bit A1.W to odd Dreg (b) */ +R1 = A1; +R3 = A1(FU); +R5 = A1(ISS2); + +//Dreg_even = A0, Dreg_odd = A1 (opt_mode) ; /* move both Accumulators to a register pair (b) */ +R0 = A0, R1 = A1; +R0 = A0, R1 = A1(FU); +R6 = A0, R7 = A1(ISS2); + + +//Dreg_odd = A1, Dreg_even = A0 (opt_mode) ; /* move both Accumulators to a register pair (b) */ +R1 = A1, R0 = A0; +R3 = A1, R2 = A0(FU); +R5 = A1, R4 = A0(ISS2); + +//IF CC DPreg = DPreg ; /* move if CC = 1 (a) */ + +IF CC R3 = R0; +IF CC R2 = R0; +IF CC R7 = R0; + +IF CC R2 = P2; +IF CC R4 = P1; +IF CC R0 = P0; +IF CC R7 = P4; + +IF CC P0 = P2; +IF CC P4 = P5; +IF CC P1 = P3; +IF CC P5 = P4; + +IF CC P0 = R2; +IF CC P4 = R3; +IF CC P5 = R7; +IF CC P2 = R6; + +//IF ! CC DPreg = DPreg ; /* move if CC = 0 (a) */ +IF !CC R3 = R0; +IF !CC R2 = R0; +IF !CC R7 = R0; + +IF !CC R2 = P2; +IF !CC R4 = P1; +IF !CC R0 = P0; +IF !CC R7 = P4; + +IF !CC P0 = P2; +IF !CC P4 = P5; +IF !CC P1 = P3; +IF !CC P5 = P4; + +IF !CC P0 = R2; +IF !CC P4 = R3; +IF !CC P5 = R7; +IF !CC P2 = R6; + +//Dreg = Dreg_lo (Z) ; /* (a) */ + +R0 = R0.L(Z); +R2 = R1.L(Z); +R1 = R2.L(Z); +R7 = R6.L(Z); + +//Dreg = Dreg_lo (X) ; /* (a)*/ +R0 = R0.L(X); +R2 = R1.L(X); +R1 = R2.L(X); +R7 = R6.L(X); + +R0 = R0.L; +R2 = R1.L; +R1 = R2.L; +R7 = R6.L; + +//A0.X = Dreg_lo ; /* least significant 8 bits of Dreg into A0.X (b) */ +A0.X = R0.L; +A0.X = R1.L; + +//A1.X = Dreg_lo ; /* least significant 8 bits of Dreg into A1.X (b) */ +A1.X = R0.L; +A1.X = R1.L; + +//Dreg_lo = A0.X ; /* 8-bit A0.X, sign-extended, into least significant 16 bits of Dreg (b) */ +R0.L = A0.X; +R1.L = A0.X; +R7.L = A0.X; + +//Dreg_lo = A1.X ; /* 8-bit A1.X, sign-extended, into least significant 16 bits of Dreg (b) */ +R0.L = A1.X; +R1.L = A1.X; +R7.L = A1.X; + +//A0.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A0.W (b) */ +A0.L = R0.L; +A0.L = R1.L; +A0.L = R6.L; + +//A1.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A1.W (b) */ +A1.L = R0.L; +A1.L = R1.L; +A1.L = R6.L; + +//A0.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A0.W (b) */ +A0.H = R0.H; +A0.H = R1.H; +A0.H = R6.H; +//A1.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A1.W (b) */ +A1.H = R0.H; +A1.H = R1.H; +A1.H = R6.H; + +//Dreg_lo = A0 (opt_mode) ; /* move A0 to lower half of Dreg (b) */ +R0.L = A0; +R1.L = A0; + +R0.L = A0(FU); +R1.L = A0(FU); + +R0.L = A0(IS); +R1.L = A0(IS); + +R0.L = A0(IU); +R1.L = A0(IU); + +R0.L = A0(T); +R1.L = A0(T); + +R0.L = A0(S2RND); +R1.L = A0(S2RND); + +R0.L = A0(ISS2); +R1.L = A0(ISS2); + +R0.L = A0(IH); +R1.L = A0(IH); + +//Dreg_hi = A1 (opt_mode) ; /* move A1 to upper half of Dreg (b) */ +R0.H = A1; +R1.H = A1; + +R0.H = A1(FU); +R1.H = A1(FU); + +R0.H = A1(IS); +R1.H = A1(IS); + +R0.H = A1(IU); +R1.H = A1(IU); + +R0.H = A1(T); +R1.H = A1(T); + +R0.H = A1(S2RND); +R1.H = A1(S2RND); + +R0.H = A1(ISS2); +R1.H = A1(ISS2); + +R0.H = A1(IH); +R1.H = A1(IH); + + +//Dreg_lo = A0, Dreg_hi = A1 (opt_mode) ; /* move both values at once; must go to the lower and upper halves of the same Dreg (b)*/ + +R0.L = A0, R0.H = A1; +R1.L = A0, R1.H = A1; + +R0.L = A0, R0.H = A1(FU); +R1.L = A0, R1.H = A1(FU); + +R0.L = A0, R0.H = A1(IS); +R1.L = A0, R1.H = A1(IS); + +R0.L = A0, R0.H = A1(IU); +R1.L = A0, R1.H = A1(IU); + +R0.L = A0, R0.H = A1(T); +R1.L = A0, R1.H = A1(T); + +R0.L = A0, R0.H = A1(S2RND); +R1.L = A0, R1.H = A1(S2RND); + +R0.L = A0, R0.H = A1(ISS2); +R1.L = A0, R1.H = A1(ISS2); + +R0.L = A0, R0.H = A1(IH); +R1.L = A0, R1.H = A1(IH); + +//Dreg_hi = A1, Dreg_lo = AO (opt_mode) ; /* move both values at once; must go to the upper and lower halves of the same Dreg (b) */ + +R0.H = A1,R0.L = A0; +R1.H = A1,R1.L = A0; + +R0.H = A1,R0.L = A0 (FU); +R1.H = A1,R1.L = A0 (FU); + +R0.H = A1,R0.L = A0 (IS); +R1.H = A1,R1.L = A0 (IS); + +R0.H = A1,R0.L = A0 (IU); +R1.H = A1,R1.L = A0 (IU); + +R0.H = A1,R0.L = A0 (T); +R1.H = A1,R1.L = A0 (T); + +R0.H = A1,R0.L = A0 (S2RND); +R1.H = A1,R1.L = A0 (S2RND); + +R0.H = A1,R0.L = A0 (ISS2); +R1.H = A1,R1.L = A0 (ISS2); + +R0.H = A1,R0.L = A0 (IH); +R1.H = A1,R1.L = A0 (IH); + +//Dreg = Dreg_byte (Z) ; /* (a)*/ + +R0 = R1.B(Z); +R0 = R2.B(Z); + +R7 = R1.B(Z); +R7 = R2.B(Z); + +//Dreg = Dreg_byte (X) ; /* (a) */ +R0 = R1.B(X); +R0 = R2.B(X); + +R7 = R1.B(X); +R7 = R2.B(X); + diff --git a/gas/testsuite/gas/bfin/parallel.s b/gas/testsuite/gas/bfin/parallel.s index d5b10dd2356..1735223beeb 100644 --- a/gas/testsuite/gas/bfin/parallel.s +++ b/gas/testsuite/gas/bfin/parallel.s @@ -1,141 +1,141 @@ - .section .text; - R5 = Deposit (r3, r2) || I0 += 2; - r0 = DEPOSIT (r7, R6) (X) || I1 += 4; - r4 = extract (r2, r1.L) (z) || I2 -= M0; - R2 = EXTRACT (r0, r2.l) (Z) || i3 += m1; - - r7 = ExtracT (r3, r4.L) (X) || I3 += M1 (breV); - r5 = ExtRACt (R6, R1.L) (x) || i0 -= 2; - - BITMUX(R1, R0, A0) (ASR) || I1 -= 4; - Bitmux (r2, R3, a0) (aSr) || I0 += 2; - - bitmux (r4, r5, a0) (asl) || Sp = [P0]; - BiTMux (R7, r6, a0) (ASl) || FP = [P1++]; - - R5.l = ones r0 || P0 = [fp--]; - r7.L = Ones R2 || p1 = [P5 + 24]; - - a0 = abs a0 || p2 = [Sp+60] || r0 = [i0]; - A0 = ABS A1 || P3 = [FP-60] || R1 = [I1++M0]; - A1 = Abs a0 || P4 = [fp-4] || r2 = [i1++]; - a1 = aBs A1 || fp = [sp] || r3 = [I2--]; - A1 = abs a1, a0 = ABS A0 || R4=[p5+56] || r0.h = w [I0]; - r0 = abs r2 || B[sp] = r0 || R1.H = W[I1++]; - - r4.L = R2.h + r0.L (s) || b [fp] = r0 || r2.H = w [i2--]; - r5.H = R1.H + R1.L (S) || b [p0] = r0 || R3.l = W[I3]; - r6.L = R6.L + r5.l (NS) || b [p1] = r0 || r4.L =w [i3++]; - - r4.l = r0 + r1 (RND20) || b [p2] = r0 || R5.l = W [i2--]; - R3.H = r5 + r0 (rnd20) || r0 = b [p0] (x) || [i0] = R6; - r1.L = r7 - R5 (rND20) || r0 = b [p4] (z) || [I1++] = R7; - - r2.L = R0 + R1 (rnd12) || r1 = b [sp] (x) || [I2--]= r7; - r7.H = r7 + r6 (RND12) || r1 = b [p0] (x)|| [I3++m1]=r6; - r5.l = r3 - R2 (rNd12) || r1 = b [p1] (z) || W [ i3 ] = r5.h; - r2.h = R1 - R2 (Rnd12) || r1 = b [p2] (z) || w [I2++] = R4.H; - - - r6.L = EXPADJ (r5, r4.l) || r1 = b [p3] (z) || W[I1--]=r3.h; - R5.l = ExpAdj (r0.h, r1.l) || r1 = b [p4] (z) || w[i0]=r2.l; - R4.L = expadj (R3, R5.L) (V) || r1 = b [p5] (z) || W [I0++] = R1.L; - - R6 = MAX (r5, R2) || r2 = b [p0] (x) || W[i1--]=R0.l; - r0 = max (r1, r3) || b [p1] = r2 || NoP; - - r5 = mIn (r2, R3) || b [p2] = r2 || r0 = [i1++]; - R4 = Min (r7, R0) || b [p3] = r2 || r1 = [i1++]; - - - A0 -= A1 || b [p4] = r2 || r2 = [i1++]; - a0 -= a1 (w32) || b [p5] = r2 || r3 = [i1++]; - - a0 += a1 || b [sp] = r2 || r4 = [i1++]; - A0 += A1 (w32) || b [fp] = r2 || r5 = [i1++]; - r7 = ( a0 += a1) || b [sp] = r3 || r6 = [i1++]; - r6.l = (A0 += a1) || b [fp] = r3 || r7 = [i1++]; - R0.H = (a0 += A1) || b [p0] = r3 || r7 = [i0++]; - - - R0.l = r1.h * r2.l || b [p1] = r3 || r1 = [i0++]; - r1.L = r5.H * r0.H (s2rnd) || b [p2] = r3 || r2 = [i0++]; - r7.l = r3.l * r3.H (FU) || b [p3] = r3 || r3 = [i0++]; - r4 = r2.H * r5.H (iSS2) || b [p4] = r3 || r0 = [i0++]; - r0 = r1.l * r3.l (is) || b [p5] = r3 || r5 = [i0++]; - r6 = R5.H * r0.l || b [fp] = r4 || r7 = [i0++]; - - r2.h = r7.l * r6.H (M, iu) || b [sp] = r4 || r6 = [i0++]; - r3.H = r5.H * r0.L || r4 = b [p0] (x) || [I0++M0] = R0; - R0.H = r1.L * r1.H (M) || r4 = b [p1] (x) || [i0++M0] = R1; - r1 = r7.H * r6.L (M, is) || r4 = b [p2] (x) || [i0++M0] = R2; - R5 = r0.l * r2.h || r4 = b [p3] (x) || [i0++m0] = R3; - r3 = r6.H * r0.H (m) || r4 = b [p4] (z) || [i0++m0] = R4; - - a0 = r5.l * R7.H (w32) || r4 = b [p5] (z) || [i0++m0] = R5; - a0 = r0.h * r0.l || r5 = b [p0] (x) || [i0++M0] =R6; - A0 += R2.L * r3.H (FU) || r5 = b [p1] (z) || [i0++M0]=R7; - A0 += r4.h * r1.L || r5 = b [p2] (z) || [I1++M1] = R7; - a0 -= r7.l * r6.H (Is) || r5 = b [p3] (x) || [i1++m1] = r6; - A0 -= R5.H * r2.H || r5 = b [p4] (z) || [i1++m1]=r5; - - a1 = r1.L * r0.H (M) || r5 = b [p5] (x) || [i1++m1]=r4; - A1 = r2.h * r0.L || r5 = b [sp] (z) || [i1++m1] = r3; - A1 = R7.H * R6.L (M, W32) || r5 = b [fp] (x) || [i1++m1] =r2; - - a1 += r3.l * r2.l (fu) || r0.l = w [i0] || [i1++m1] = r1; - a1 += R6.H * r1.L || r1.l = w [i0] || [i1++m1] = R0; - A1 -= r0.L * R3.H (is) || r2.l = w [i0] || [i2++m2] = R0; - a1 -= r2.l * r7.h || r3.l = w [i0] || [I2++M2] =R1; - - r7.l = (a0 = r6.H * r5.L) || r4.l = w [i0] || [i2++m2] = r2; - r0.L = (A0 = r1.h * R2.l) (tfu) || r5.l = w [i0] || [I2++m2] = R3; - R2.L = (a0 += r5.L * r4.L) || r6.l = w [i0] || [I2++m2] = R4; - r3.l = (A0 += r7.H * r6.h) (T) || r7.l = w [i0] || [ i2 ++ m2] = R5; - r0.l = (a0 -= r3.h * r2.h) || r7.l = w [i1++] || [i2++m2] = r6; - r1.l = (a0 -= r5.L * r4.L) (iH) || r6.l = w [i1++] || [i2++m2] = R7; - - r1.H = (a1 = r1.l * R0.H) || r2.l = w [i1++] || [i3++m3] = R7; - r2.h = (A1 = r0.H * r3.L) (M, Iss2) || r3.l = w [i1++] || [i3++m3] = r6; - R6.H = (a1 += r7.l * r7.H) || r4.l = w [i1++] || [i3++m3] = R5; - r7.h = (a1 += R2.L * R3.L) (S2rnd) || r5.l = w [i1++] || [i3++m3] = r4; - r6.H = (A1 -= R4.h * r2.h) || r6.l = w [i1++] || [i3++m3] = r3; - r5.h = (a1 -= r3.H * r7.L) (M, tFu) || r7.l = w [i1++] || [i3++m3] = r2; - - R0 = (A0 = R1.L * R2.L) || R1.L = W [I2--] || [i3++m3] = r1; - R2 = (A0 = r1.l * r2.l) (is) || R1.L = W [I2--] || [i3++m3] = r0; - r4 = (a0 += r7.h * r6.L) || R2.L = W [I2--] || r0.h = w[i0]; - r6 = (A0 += R5.L * r3.h) (s2RND) || R3.L = W [I2--] || R1.H = w[i1]; - R6 = (a0 -= r2.h * r7.l) || R4.L = W [I2--] || r2.h = w[i2]; - r4 = (A0 -= R0.L * r6.H) (FU) || R5.L = W [I2--] || r3.h = w[i3]; - - r7 = (a1 = r0.h * r1.l) || R6.L = W [I2--] || r4.h = w[i3]; - R5 = (A1 = r2.H * r3.H) (M, fu) || R7.L = W [I2--] || r4.h = W[i2]; - R3 = (A1 += r7.l * r5.l) || w [p0] = r0.L || r6.h = W[i1]; - r1 = (a1 += r2.h * r7.h) (iss2) || w [p0] = r1.L || r7.h = w[i0]; - r3 = (A1 -= r0.l * R0.H) || w [p0] = r2.L || r7.L = w[I0++]; - R5 = (a1 -= R2.l * R7.h) (m, is) || w [p0] = r3.L || R6.L = W [i1++]; - - r7 = -R2(s) || w [p0] = r4.L || r5.l = w[i2++]; - A0 = -A0 || w [p0] = r5.L || r4.l = w[i3++]; - a0 = -a1 || w [p0] = r6.L || r3.L = w [i3--]; - A1 = -A0 || w [p0] = r7.L || r2.l = W [i1++]; - a1 = -A1 || w [p1] = r0 || r1.L = w [i2--]; - a1 = -a1, a0 = -a0 || w [p1] = r1 || r0.l = w [i1--]; - - R5.L = r3 (rnd) || w [p1] = r2 || r0 = [i0++m3]; - r6.H = r0 (RND) || w [p1] = r3 || r1 = [i1++m2]; - - A0 = A0 (S) || w [p1] = r4 || r2 = [i2++m1]; - a1 = a1 (s) || w [p1] = r5 || r3 = [i3++m0]; - A1 = a1 (S), a0 = A0 (s) || r6 = w [p1] (z) || [i0] = r0; - - R5.l = signbits r0 || r7 = w [p1] (z) || [i1] = R0; - r0.L = SIGNbits r7.H || r1 = w [p2++](x) || [I2] = r0; - r3.l = signBits A0 || r2 = w [p2++] (x) || [I3] = R0; - r7.L = SIGNBITS a1 || r3 = w [p2++] (z) || [i0] = R1; - - r5.l = R6.H - R7.h (s) || r4 = w [p2++] (x) || [i1] = r1; - r0.H = r3.l - r3.h (NS) || r5 = w [p2++] (x) || [i2] = r2; - - R1 = [I0++] || R2 = ABS R2 || NOP; + .section .text; + R5 = Deposit (r3, r2) || I0 += 2; + r0 = DEPOSIT (r7, R6) (X) || I1 += 4; + r4 = extract (r2, r1.L) (z) || I2 -= M0; + R2 = EXTRACT (r0, r2.l) (Z) || i3 += m1; + + r7 = ExtracT (r3, r4.L) (X) || I3 += M1 (breV); + r5 = ExtRACt (R6, R1.L) (x) || i0 -= 2; + + BITMUX(R1, R0, A0) (ASR) || I1 -= 4; + Bitmux (r2, R3, a0) (aSr) || I0 += 2; + + bitmux (r4, r5, a0) (asl) || Sp = [P0]; + BiTMux (R7, r6, a0) (ASl) || FP = [P1++]; + + R5.l = ones r0 || P0 = [fp--]; + r7.L = Ones R2 || p1 = [P5 + 24]; + + a0 = abs a0 || p2 = [Sp+60] || r0 = [i0]; + A0 = ABS A1 || P3 = [FP-60] || R1 = [I1++M0]; + A1 = Abs a0 || P4 = [fp-4] || r2 = [i1++]; + a1 = aBs A1 || fp = [sp] || r3 = [I2--]; + A1 = abs a1, a0 = ABS A0 || R4=[p5+56] || r0.h = w [I0]; + r0 = abs r2 || B[sp] = r0 || R1.H = W[I1++]; + + r4.L = R2.h + r0.L (s) || b [fp] = r0 || r2.H = w [i2--]; + r5.H = R1.H + R1.L (S) || b [p0] = r0 || R3.l = W[I3]; + r6.L = R6.L + r5.l (NS) || b [p1] = r0 || r4.L =w [i3++]; + + r4.l = r0 + r1 (RND20) || b [p2] = r0 || R5.l = W [i2--]; + R3.H = r5 + r0 (rnd20) || r0 = b [p0] (x) || [i0] = R6; + r1.L = r7 - R5 (rND20) || r0 = b [p4] (z) || [I1++] = R7; + + r2.L = R0 + R1 (rnd12) || r1 = b [sp] (x) || [I2--]= r7; + r7.H = r7 + r6 (RND12) || r1 = b [p0] (x)|| [I3++m1]=r6; + r5.l = r3 - R2 (rNd12) || r1 = b [p1] (z) || W [ i3 ] = r5.h; + r2.h = R1 - R2 (Rnd12) || r1 = b [p2] (z) || w [I2++] = R4.H; + + + r6.L = EXPADJ (r5, r4.l) || r1 = b [p3] (z) || W[I1--]=r3.h; + R5.l = ExpAdj (r0.h, r1.l) || r1 = b [p4] (z) || w[i0]=r2.l; + R4.L = expadj (R3, R5.L) (V) || r1 = b [p5] (z) || W [I0++] = R1.L; + + R6 = MAX (r5, R2) || r2 = b [p0] (x) || W[i1--]=R0.l; + r0 = max (r1, r3) || b [p1] = r2 || NoP; + + r5 = mIn (r2, R3) || b [p2] = r2 || r0 = [i1++]; + R4 = Min (r7, R0) || b [p3] = r2 || r1 = [i1++]; + + + A0 -= A1 || b [p4] = r2 || r2 = [i1++]; + a0 -= a1 (w32) || b [p5] = r2 || r3 = [i1++]; + + a0 += a1 || b [sp] = r2 || r4 = [i1++]; + A0 += A1 (w32) || b [fp] = r2 || r5 = [i1++]; + r7 = ( a0 += a1) || b [sp] = r3 || r6 = [i1++]; + r6.l = (A0 += a1) || b [fp] = r3 || r7 = [i1++]; + R0.H = (a0 += A1) || b [p0] = r3 || r7 = [i0++]; + + + R0.l = r1.h * r2.l || b [p1] = r3 || r1 = [i0++]; + r1.L = r5.H * r0.H (s2rnd) || b [p2] = r3 || r2 = [i0++]; + r7.l = r3.l * r3.H (FU) || b [p3] = r3 || r3 = [i0++]; + r4 = r2.H * r5.H (iSS2) || b [p4] = r3 || r0 = [i0++]; + r0 = r1.l * r3.l (is) || b [p5] = r3 || r5 = [i0++]; + r6 = R5.H * r0.l || b [fp] = r4 || r7 = [i0++]; + + r2.h = r7.l * r6.H (M, iu) || b [sp] = r4 || r6 = [i0++]; + r3.H = r5.H * r0.L || r4 = b [p0] (x) || [I0++M0] = R0; + R0.H = r1.L * r1.H (M) || r4 = b [p1] (x) || [i0++M0] = R1; + r1 = r7.H * r6.L (M, is) || r4 = b [p2] (x) || [i0++M0] = R2; + R5 = r0.l * r2.h || r4 = b [p3] (x) || [i0++m0] = R3; + r3 = r6.H * r0.H (m) || r4 = b [p4] (z) || [i0++m0] = R4; + + a0 = r5.l * R7.H (w32) || r4 = b [p5] (z) || [i0++m0] = R5; + a0 = r0.h * r0.l || r5 = b [p0] (x) || [i0++M0] =R6; + A0 += R2.L * r3.H (FU) || r5 = b [p1] (z) || [i0++M0]=R7; + A0 += r4.h * r1.L || r5 = b [p2] (z) || [I1++M1] = R7; + a0 -= r7.l * r6.H (Is) || r5 = b [p3] (x) || [i1++m1] = r6; + A0 -= R5.H * r2.H || r5 = b [p4] (z) || [i1++m1]=r5; + + a1 = r1.L * r0.H (M) || r5 = b [p5] (x) || [i1++m1]=r4; + A1 = r2.h * r0.L || r5 = b [sp] (z) || [i1++m1] = r3; + A1 = R7.H * R6.L (M, W32) || r5 = b [fp] (x) || [i1++m1] =r2; + + a1 += r3.l * r2.l (fu) || r0.l = w [i0] || [i1++m1] = r1; + a1 += R6.H * r1.L || r1.l = w [i0] || [i1++m1] = R0; + A1 -= r0.L * R3.H (is) || r2.l = w [i0] || [i2++m2] = R0; + a1 -= r2.l * r7.h || r3.l = w [i0] || [I2++M2] =R1; + + r7.l = (a0 = r6.H * r5.L) || r4.l = w [i0] || [i2++m2] = r2; + r0.L = (A0 = r1.h * R2.l) (tfu) || r5.l = w [i0] || [I2++m2] = R3; + R2.L = (a0 += r5.L * r4.L) || r6.l = w [i0] || [I2++m2] = R4; + r3.l = (A0 += r7.H * r6.h) (T) || r7.l = w [i0] || [ i2 ++ m2] = R5; + r0.l = (a0 -= r3.h * r2.h) || r7.l = w [i1++] || [i2++m2] = r6; + r1.l = (a0 -= r5.L * r4.L) (iH) || r6.l = w [i1++] || [i2++m2] = R7; + + r1.H = (a1 = r1.l * R0.H) || r2.l = w [i1++] || [i3++m3] = R7; + r2.h = (A1 = r0.H * r3.L) (M, Iss2) || r3.l = w [i1++] || [i3++m3] = r6; + R6.H = (a1 += r7.l * r7.H) || r4.l = w [i1++] || [i3++m3] = R5; + r7.h = (a1 += R2.L * R3.L) (S2rnd) || r5.l = w [i1++] || [i3++m3] = r4; + r6.H = (A1 -= R4.h * r2.h) || r6.l = w [i1++] || [i3++m3] = r3; + r5.h = (a1 -= r3.H * r7.L) (M, tFu) || r7.l = w [i1++] || [i3++m3] = r2; + + R0 = (A0 = R1.L * R2.L) || R1.L = W [I2--] || [i3++m3] = r1; + R2 = (A0 = r1.l * r2.l) (is) || R1.L = W [I2--] || [i3++m3] = r0; + r4 = (a0 += r7.h * r6.L) || R2.L = W [I2--] || r0.h = w[i0]; + r6 = (A0 += R5.L * r3.h) (s2RND) || R3.L = W [I2--] || R1.H = w[i1]; + R6 = (a0 -= r2.h * r7.l) || R4.L = W [I2--] || r2.h = w[i2]; + r4 = (A0 -= R0.L * r6.H) (FU) || R5.L = W [I2--] || r3.h = w[i3]; + + r7 = (a1 = r0.h * r1.l) || R6.L = W [I2--] || r4.h = w[i3]; + R5 = (A1 = r2.H * r3.H) (M, fu) || R7.L = W [I2--] || r4.h = W[i2]; + R3 = (A1 += r7.l * r5.l) || w [p0] = r0.L || r6.h = W[i1]; + r1 = (a1 += r2.h * r7.h) (iss2) || w [p0] = r1.L || r7.h = w[i0]; + r3 = (A1 -= r0.l * R0.H) || w [p0] = r2.L || r7.L = w[I0++]; + R5 = (a1 -= R2.l * R7.h) (m, is) || w [p0] = r3.L || R6.L = W [i1++]; + + r7 = -R2(s) || w [p0] = r4.L || r5.l = w[i2++]; + A0 = -A0 || w [p0] = r5.L || r4.l = w[i3++]; + a0 = -a1 || w [p0] = r6.L || r3.L = w [i3--]; + A1 = -A0 || w [p0] = r7.L || r2.l = W [i1++]; + a1 = -A1 || w [p1] = r0 || r1.L = w [i2--]; + a1 = -a1, a0 = -a0 || w [p1] = r1 || r0.l = w [i1--]; + + R5.L = r3 (rnd) || w [p1] = r2 || r0 = [i0++m3]; + r6.H = r0 (RND) || w [p1] = r3 || r1 = [i1++m2]; + + A0 = A0 (S) || w [p1] = r4 || r2 = [i2++m1]; + a1 = a1 (s) || w [p1] = r5 || r3 = [i3++m0]; + A1 = a1 (S), a0 = A0 (s) || r6 = w [p1] (z) || [i0] = r0; + + R5.l = signbits r0 || r7 = w [p1] (z) || [i1] = R0; + r0.L = SIGNbits r7.H || r1 = w [p2++](x) || [I2] = r0; + r3.l = signBits A0 || r2 = w [p2++] (x) || [I3] = R0; + r7.L = SIGNBITS a1 || r3 = w [p2++] (z) || [i0] = R1; + + r5.l = R6.H - R7.h (s) || r4 = w [p2++] (x) || [i1] = r1; + r0.H = r3.l - r3.h (NS) || r5 = w [p2++] (x) || [i2] = r2; + + R1 = [I0++] || R2 = ABS R2 || NOP; diff --git a/gas/testsuite/gas/bfin/parallel2.s b/gas/testsuite/gas/bfin/parallel2.s index 064e98fbd72..4cce350ff43 100644 --- a/gas/testsuite/gas/bfin/parallel2.s +++ b/gas/testsuite/gas/bfin/parallel2.s @@ -1,80 +1,80 @@ - .section .text; - A0 = A1 || P0 = [sp+20]; - a1 = a0 || P0 = [p5+24]; - a0 = R0 || P0 = [P4+28]; - A1 = r1 || P0 = [P3+32]; - - R4 = A0 (fu) || P0 = [p3+36]; - r5 = A1 (ISS2) || P0 = [P3+40]; - R6 = a0 || P0 = [P4+44]; - R7 = A1 || P0 = [P4+48]; - R6 = A0, R7 = a1 || P0 = [P4+52]; - r1 = a1, r0 = a0 (fu) || P0 = [P4+56]; - - A0.X = r5.l || p0 = [p4+60]; - a1.X = r2.L || r0 = [i0 ++ m0]; - r0.l = a0.x || r1 = [i0 ++ m1]; - R7.l = A1.X || r0 = [i0 ++ m2]; - A0.L = r3.l || r0 = [i0 ++ m3]; - a1.l = r4.l || r0 = [i1 ++ m3]; - A0.h = r6.H || r0 = [i1 ++ m2]; - A1.H = r5.h || r0 = [i1 ++ m1]; - r0.l = A0 (iu) || r4 = [i1 ++ m0]; - R1.H = A1 (s2rnd) || r0 = [i2 ++ m0]; - r1.h = a1 || r0 = [i2 ++ m1]; - R2.l = A0, r2.H = A1 (IH) || r0 = [i2 ++ m2]; - R2.l = A0, r2.H = A1 || r0 = [i2 ++ m3]; - r0.H = A1, R0.L = a0 (t) || r5 = [i3 ++ m0]; - r0.H = A1, R0.L = a0 (fu) || r5 = [i3 ++ m1]; - r0.H = A1, R0.L = a0 (is) || r5 = [i3 ++ m2]; - r0.H = A1, R0.L = a0 || r5 = [i3 ++ m3]; - - A0 = A0 >> 31 || r0 = [fp - 32]; - a0 = a0 << 31 || r0 = [fp - 28]; - a1 = a1 >> 0 || r0 = [fp - 24]; - A1 = A1 << 0 || r0 = [fp - 20]; - r7 = r5 << 31 (s) || r0 = [fp - 16]; - R3 = r2 >>> 22 || r0 = [fp - 12]; - r1.L = R2.H << 15 (S) || r0 = [fp - 8]; - r5.h = r2.l >>> 2 || r0 = [fp - 4]; - - r3.l = Ashift r4.h by r2.l || r0 = [fp - 100]; - R7.H = ASHIFT R7.L by R0.L (S) || r0 = [fp - 104]; - r7.h = ashift r7.l by r0.l (s) || r0 = [fp - 108]; - r6 = AShiFT R5 by R2.L || r0 = [fp - 112]; - R0 = Ashift R4 by r1.l (s) || r3 = [fp - 116]; - r2 = ashift r6 BY r3.L (S) || r0 = [fp - 120]; - A0 = Ashift a0 by r1.l || r0 = [fp - 124]; - a1 = ASHIFT a1 by r0.L || r0 = [fp - 128]; - - r1.H = r2.l >> 15 || R5 = W [P1--] (z); - r7.l = r0.L << 0 || R5 = W [P2] (z); - r5 = r5 >> 31 || R7 = W [P2++] (z); - r0 = r0 << 12 || R5 = W [P2--] (z); - A0 = A0 >> 1 || R5 = W [P2+0] (z); - A0 = A0 << 0 || R5 = W [P2+2] (z); - a1 = A1 << 31 || R5 = W [P2+4] (z); - a1 = a1 >> 16 || R5 = W [P2+30] (z); - - R1.H = LShift r2.h by r0.l || R5 = W [P2+24] (z); - r0.l = LSHIFT r0.h by r1.l || R5 = W [P2+22] (z); - r7.L = lshift r6.L BY r2.l || R5 = W [P2+20] (z); - r5 = LShIft R4 bY r3.L || R4 = W [P2+18] (z); - A0 = Lshift a0 By R6.L || R5 = W [P2+16] (z); - A1 = LsHIFt a1 by r5.l || R5 = W [P2+14] (z); - - r7 = ROT r7 by -32 || R5 = W [P2+12] (z); - R6 = Rot r7 by -31 || R5 = W [P2+10] (z); - R5 = RoT R7 by 31 || R6 = W [P2+8] (z); - R4 = Rot r7 by 30 || R5 = W [P2+6] (z); - a0 = rot A0 by 0 || R5 = W [P3] (z); - A0 = ROT a0 BY 10 || R5 = W [P3++] (z); - A1 = ROT A1 by -20 || R5 = W [P3--] (z); - A1 = ROT a1 By -32 || R5 = W [P4] (z); - - r0 = rot r1 by r2.L || R5 = W [P4++] (z); - R0 = Rot R4 BY R3.L || R5 = W [P4--] (z); - A0 = ROT A0 by r7.l || R5 = W [P5] (z); - A1 = rot a1 bY r6.l || R5 = W [P5++] (z); - - NOp || R5 = W [P5--] (z); + .section .text; + A0 = A1 || P0 = [sp+20]; + a1 = a0 || P0 = [p5+24]; + a0 = R0 || P0 = [P4+28]; + A1 = r1 || P0 = [P3+32]; + + R4 = A0 (fu) || P0 = [p3+36]; + r5 = A1 (ISS2) || P0 = [P3+40]; + R6 = a0 || P0 = [P4+44]; + R7 = A1 || P0 = [P4+48]; + R6 = A0, R7 = a1 || P0 = [P4+52]; + r1 = a1, r0 = a0 (fu) || P0 = [P4+56]; + + A0.X = r5.l || p0 = [p4+60]; + a1.X = r2.L || r0 = [i0 ++ m0]; + r0.l = a0.x || r1 = [i0 ++ m1]; + R7.l = A1.X || r0 = [i0 ++ m2]; + A0.L = r3.l || r0 = [i0 ++ m3]; + a1.l = r4.l || r0 = [i1 ++ m3]; + A0.h = r6.H || r0 = [i1 ++ m2]; + A1.H = r5.h || r0 = [i1 ++ m1]; + r0.l = A0 (iu) || r4 = [i1 ++ m0]; + R1.H = A1 (s2rnd) || r0 = [i2 ++ m0]; + r1.h = a1 || r0 = [i2 ++ m1]; + R2.l = A0, r2.H = A1 (IH) || r0 = [i2 ++ m2]; + R2.l = A0, r2.H = A1 || r0 = [i2 ++ m3]; + r0.H = A1, R0.L = a0 (t) || r5 = [i3 ++ m0]; + r0.H = A1, R0.L = a0 (fu) || r5 = [i3 ++ m1]; + r0.H = A1, R0.L = a0 (is) || r5 = [i3 ++ m2]; + r0.H = A1, R0.L = a0 || r5 = [i3 ++ m3]; + + A0 = A0 >> 31 || r0 = [fp - 32]; + a0 = a0 << 31 || r0 = [fp - 28]; + a1 = a1 >> 0 || r0 = [fp - 24]; + A1 = A1 << 0 || r0 = [fp - 20]; + r7 = r5 << 31 (s) || r0 = [fp - 16]; + R3 = r2 >>> 22 || r0 = [fp - 12]; + r1.L = R2.H << 15 (S) || r0 = [fp - 8]; + r5.h = r2.l >>> 2 || r0 = [fp - 4]; + + r3.l = Ashift r4.h by r2.l || r0 = [fp - 100]; + R7.H = ASHIFT R7.L by R0.L (S) || r0 = [fp - 104]; + r7.h = ashift r7.l by r0.l (s) || r0 = [fp - 108]; + r6 = AShiFT R5 by R2.L || r0 = [fp - 112]; + R0 = Ashift R4 by r1.l (s) || r3 = [fp - 116]; + r2 = ashift r6 BY r3.L (S) || r0 = [fp - 120]; + A0 = Ashift a0 by r1.l || r0 = [fp - 124]; + a1 = ASHIFT a1 by r0.L || r0 = [fp - 128]; + + r1.H = r2.l >> 15 || R5 = W [P1--] (z); + r7.l = r0.L << 0 || R5 = W [P2] (z); + r5 = r5 >> 31 || R7 = W [P2++] (z); + r0 = r0 << 12 || R5 = W [P2--] (z); + A0 = A0 >> 1 || R5 = W [P2+0] (z); + A0 = A0 << 0 || R5 = W [P2+2] (z); + a1 = A1 << 31 || R5 = W [P2+4] (z); + a1 = a1 >> 16 || R5 = W [P2+30] (z); + + R1.H = LShift r2.h by r0.l || R5 = W [P2+24] (z); + r0.l = LSHIFT r0.h by r1.l || R5 = W [P2+22] (z); + r7.L = lshift r6.L BY r2.l || R5 = W [P2+20] (z); + r5 = LShIft R4 bY r3.L || R4 = W [P2+18] (z); + A0 = Lshift a0 By R6.L || R5 = W [P2+16] (z); + A1 = LsHIFt a1 by r5.l || R5 = W [P2+14] (z); + + r7 = ROT r7 by -32 || R5 = W [P2+12] (z); + R6 = Rot r7 by -31 || R5 = W [P2+10] (z); + R5 = RoT R7 by 31 || R6 = W [P2+8] (z); + R4 = Rot r7 by 30 || R5 = W [P2+6] (z); + a0 = rot A0 by 0 || R5 = W [P3] (z); + A0 = ROT a0 BY 10 || R5 = W [P3++] (z); + A1 = ROT A1 by -20 || R5 = W [P3--] (z); + A1 = ROT a1 By -32 || R5 = W [P4] (z); + + r0 = rot r1 by r2.L || R5 = W [P4++] (z); + R0 = Rot R4 BY R3.L || R5 = W [P4--] (z); + A0 = ROT A0 by r7.l || R5 = W [P5] (z); + A1 = rot a1 bY r6.l || R5 = W [P5++] (z); + + NOp || R5 = W [P5--] (z); diff --git a/gas/testsuite/gas/bfin/parallel3.s b/gas/testsuite/gas/bfin/parallel3.s index 538fad701ec..bd313341a13 100644 --- a/gas/testsuite/gas/bfin/parallel3.s +++ b/gas/testsuite/gas/bfin/parallel3.s @@ -1,95 +1,95 @@ - .section .text; - r4.h = r4.l = Sign (R1.h) * R5.h + Sign(r1.L) * R5.L|| [p0] = P0; - - R7 = Vit_Max (R5, r2) (ASL)|| [p0++] = P0; - r0 = VIT_MAX (r0, r6) (asr)|| [p0--] = P0; - r5.l = vit_max (R3) (asL)|| [p0+4] = P0; - r2.L = VIT_Max (r2) (Asr)|| [p0+8] = P0; - - R5 = ABS R5 (V)|| [p0+60] = P0; - r2 = abs r0 (v)|| [p0+56] = P0; - - R5 = r3 +|+ R2|| [p0+52] = P0; - r5 = r3 +|+ r2 (Sco)|| [p1] = P0; - r7 = R0 -|+ r6|| [p1++] = P0; - r2 = R1 -|+ R3 (S)|| [p1--] = P0; - R4 = R0 +|- R2|| [p1+48] = P0; - R5 = r1 +|- r2 (CO)|| [p1+44] = P0; - r6 = r3 -|- R4|| [p1+40] = P0; - r7 = R5 -|- R6 (co)|| [p2] = P0; - - r5 = r4 +|+ r3, R7 = r4 -|- r3 (Sco, ASR)|| [p2++] = P0; - R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL)|| [p2--] = P0; - R7 = R1 +|- R2, R6 = R1 -|+ R2 (S)|| [p2+36] = P0; - r1 = r2 +|- r3, r5 = r2 -|+ r3|| [p2+32] = P0; - - R5 = R0 + R1, R6 = R0 - R1|| [p3] = P0; - r0 = r7 + r1, r3 = r7 - r1 (s)|| [p3++] = P0; - - r7 = A1 + A0, r5 = A1 - A0|| [p3--] = P0; - r3 = a0 + a1, r6 = a0 - a1 (s)|| [p3+28] = P0; - - R1 = R3 >>> 15 (V)|| [p3+24] = P0; - r4 = r0 >>> 4 (v)|| [p4] = P0; - r5 = r0 << 0 (v,s)|| [p4++] = P0; - r2 = r2 << 12 (v, S)|| [p4--] = P0; - - R7 = ASHIFT R5 BY R2.L (V)|| [p4+24] = P0; - r0 = Ashift r2 by r0.L (v, s)|| [p4+20] = P0; - - R5 = r2 >> 15 (V)|| [p4+16] = P0; - r0 = R1 << 2 (v)|| [p4+12] = P0; - - R4 = lshift r1 by r2.L (v)|| [p5] = P0; - - R6 = MAX (R0, R1) (V)|| [p5++] = P0; - r0 = min (r2, r7) (v)|| [p5--] = P0; - - r2.h = r7.l * r6.h, r2.l = r7.h * r6.h|| [p5+8] = P0; - R4.L = R1.L * R0.L, R4.H = R1.H * R0.H|| [p5+4] = P0; - R0.h = R3.H * r2.l, r0.l=r3.l * r2.l|| [p5] = P0; - r5.h = r3.h * r2.h (M), r5.l = r3.L * r2.L (fu)|| [sp] = P0; - R0 = r4.l * r7.l, r1 = r4.h * r7.h (s2rnd)|| [sp++] = P0; - R7 = R2.l * r5.l, r6 = r2.h * r5.h|| [sp--] = P0; - R0.L = R7.L * R6.L, R0.H = R7.H * R6.H (ISS2)|| [sp+60] = P0; - r3.h = r0.h * r1.h, r3.l = r0.l * r1.l (is)|| [fp] = P0; - - a1 = r2.l * r3.h, a0 = r2.h * R3.H|| [fp++] = P0; - A0 = R1.l * R0.L, A1 += R1.h * R0.h|| [fp--] = P0; - A1 = R5.h * R7.H, A0 += r5.L * r7.l (w32)|| [fp+0] = P0; - a1 += r0.H * r1.H, A0 = R0.L * R1.l (is)|| [fp+60] = P0; - a1 = r3.h * r4.h (m), a0 += r3.l * R4.L (FU)|| [p0] = P1; - A1 += r4.H * R4.L, a0 -= r4.h * r4.h|| [p0] = P2; - - r0.l = (a0 += R7.l * R6.L), R0.H = (A1 += R7.H * R6.H) (Iss2)|| [p0] = P3; - r2.H = A1, r2.l = (a0 += r0.L * r1.L) (s2rnd)|| [p0] = P4; - r7.h = (a1 = r2.h * r1.h), a0 += r2.l * r1.l|| [p0] = P5; - R2.H = (A1 = R7.L * R6.H), R2.L = (A0 = R7.H * R6.h)|| [p0] = fp; - r6.L = (A0 = R3.L * r2.L), R6.H = (A1 += R3.H * R2.H)|| [p0] = sp; - R7.h = (a1 += r6.h * r5.l), r7.l = (a0=r6.h * r5.h)|| [p0] = r1; - r0.h = (A1 = r7.h * R4.l) (M), R0.l = (a0 += r7.l * r4.l)|| [p0++] = r2; - R5.H = (a1 = r3.h * r2.h) (m), r5.l= (a0 += r3.l * r2.l) (fu)|| [p1--] = r3; - r0.h = (A1 += R3.h * R2.h), R0.L = ( A0 = R3.L * R2.L) (is)|| [i0] = r0; - - R3 = (A1 = R6.H * R7.H) (M), A0 -= R6.L * R7.L|| [i0++] = r1; - r1 = (a1 = r7.l * r4.l) (m), r0 = (a0 += r7.h * r4.h)|| [i0--] = r2; - R0 = (a0 += r7.l * r6.l), r1 = (a1+= r7.h * r6.h) (ISS2)|| [i1] = r3; - r4 = (a0 = r6.l * r7.l), r5 = (a1 += r6.h * r7.h)|| [i1++] = r3; - R7 = (A1 += r3.h * r5.H), R6 = (A0 -= r3.l * r5.l)|| [i1--] = r3; - r5 = (a1 -= r6.h * r7.h), a0 += r6.l * r7.l|| [i2] = r0; - R3 = (A1 = r6.h * R7.h), R2 = (A0 = R6.l * r7.l)|| [i2++] = r0; - R5 = (A1 = r3.h * r7.h) (M), r4 = (A0 += R3.l * r7.l) (fu)|| [i2--] = R0; - R3 = a1, r2 = (a0 += r0.l *r1.l) (s2rnd)|| [i3] = R7; - r1 = (a1 += r3.h * r2.h), r0 = (a0 = r3.l * r2.l) (is)|| [i3++] = R7; - - R0 = - R1 (V)|| [i3--] = R6; - r7 = - r2 (v)|| [p0++p1] = R0; - - R7 = Pack (r0.h, r1.l)|| [p0++p1] = R3; - r6 = PACK (r1.H, r6.H)|| [p0++p2] = r0; - R5 = pack (R2.L, R2.H)|| [p0++p3] = r4; - - (R0, R1) = search R2 (lt)|| r2 = [p0+4]; - (r6, r7) = Search r0 (LE)|| r5 = [p0--]; - (r3, r6) = SEARCH r1 (Gt)|| r0 = [p0+20]; - (r4, R5) = sEARch r3 (gE)|| r1 = [p0++]; + .section .text; + r4.h = r4.l = Sign (R1.h) * R5.h + Sign(r1.L) * R5.L|| [p0] = P0; + + R7 = Vit_Max (R5, r2) (ASL)|| [p0++] = P0; + r0 = VIT_MAX (r0, r6) (asr)|| [p0--] = P0; + r5.l = vit_max (R3) (asL)|| [p0+4] = P0; + r2.L = VIT_Max (r2) (Asr)|| [p0+8] = P0; + + R5 = ABS R5 (V)|| [p0+60] = P0; + r2 = abs r0 (v)|| [p0+56] = P0; + + R5 = r3 +|+ R2|| [p0+52] = P0; + r5 = r3 +|+ r2 (Sco)|| [p1] = P0; + r7 = R0 -|+ r6|| [p1++] = P0; + r2 = R1 -|+ R3 (S)|| [p1--] = P0; + R4 = R0 +|- R2|| [p1+48] = P0; + R5 = r1 +|- r2 (CO)|| [p1+44] = P0; + r6 = r3 -|- R4|| [p1+40] = P0; + r7 = R5 -|- R6 (co)|| [p2] = P0; + + r5 = r4 +|+ r3, R7 = r4 -|- r3 (Sco, ASR)|| [p2++] = P0; + R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL)|| [p2--] = P0; + R7 = R1 +|- R2, R6 = R1 -|+ R2 (S)|| [p2+36] = P0; + r1 = r2 +|- r3, r5 = r2 -|+ r3|| [p2+32] = P0; + + R5 = R0 + R1, R6 = R0 - R1|| [p3] = P0; + r0 = r7 + r1, r3 = r7 - r1 (s)|| [p3++] = P0; + + r7 = A1 + A0, r5 = A1 - A0|| [p3--] = P0; + r3 = a0 + a1, r6 = a0 - a1 (s)|| [p3+28] = P0; + + R1 = R3 >>> 15 (V)|| [p3+24] = P0; + r4 = r0 >>> 4 (v)|| [p4] = P0; + r5 = r0 << 0 (v,s)|| [p4++] = P0; + r2 = r2 << 12 (v, S)|| [p4--] = P0; + + R7 = ASHIFT R5 BY R2.L (V)|| [p4+24] = P0; + r0 = Ashift r2 by r0.L (v, s)|| [p4+20] = P0; + + R5 = r2 >> 15 (V)|| [p4+16] = P0; + r0 = R1 << 2 (v)|| [p4+12] = P0; + + R4 = lshift r1 by r2.L (v)|| [p5] = P0; + + R6 = MAX (R0, R1) (V)|| [p5++] = P0; + r0 = min (r2, r7) (v)|| [p5--] = P0; + + r2.h = r7.l * r6.h, r2.l = r7.h * r6.h|| [p5+8] = P0; + R4.L = R1.L * R0.L, R4.H = R1.H * R0.H|| [p5+4] = P0; + R0.h = R3.H * r2.l, r0.l=r3.l * r2.l|| [p5] = P0; + r5.h = r3.h * r2.h (M), r5.l = r3.L * r2.L (fu)|| [sp] = P0; + R0 = r4.l * r7.l, r1 = r4.h * r7.h (s2rnd)|| [sp++] = P0; + R7 = R2.l * r5.l, r6 = r2.h * r5.h|| [sp--] = P0; + R0.L = R7.L * R6.L, R0.H = R7.H * R6.H (ISS2)|| [sp+60] = P0; + r3.h = r0.h * r1.h, r3.l = r0.l * r1.l (is)|| [fp] = P0; + + a1 = r2.l * r3.h, a0 = r2.h * R3.H|| [fp++] = P0; + A0 = R1.l * R0.L, A1 += R1.h * R0.h|| [fp--] = P0; + A1 = R5.h * R7.H, A0 += r5.L * r7.l (w32)|| [fp+0] = P0; + a1 += r0.H * r1.H, A0 = R0.L * R1.l (is)|| [fp+60] = P0; + a1 = r3.h * r4.h (m), a0 += r3.l * R4.L (FU)|| [p0] = P1; + A1 += r4.H * R4.L, a0 -= r4.h * r4.h|| [p0] = P2; + + r0.l = (a0 += R7.l * R6.L), R0.H = (A1 += R7.H * R6.H) (Iss2)|| [p0] = P3; + r2.H = A1, r2.l = (a0 += r0.L * r1.L) (s2rnd)|| [p0] = P4; + r7.h = (a1 = r2.h * r1.h), a0 += r2.l * r1.l|| [p0] = P5; + R2.H = (A1 = R7.L * R6.H), R2.L = (A0 = R7.H * R6.h)|| [p0] = fp; + r6.L = (A0 = R3.L * r2.L), R6.H = (A1 += R3.H * R2.H)|| [p0] = sp; + R7.h = (a1 += r6.h * r5.l), r7.l = (a0=r6.h * r5.h)|| [p0] = r1; + r0.h = (A1 = r7.h * R4.l) (M), R0.l = (a0 += r7.l * r4.l)|| [p0++] = r2; + R5.H = (a1 = r3.h * r2.h) (m), r5.l= (a0 += r3.l * r2.l) (fu)|| [p1--] = r3; + r0.h = (A1 += R3.h * R2.h), R0.L = ( A0 = R3.L * R2.L) (is)|| [i0] = r0; + + R3 = (A1 = R6.H * R7.H) (M), A0 -= R6.L * R7.L|| [i0++] = r1; + r1 = (a1 = r7.l * r4.l) (m), r0 = (a0 += r7.h * r4.h)|| [i0--] = r2; + R0 = (a0 += r7.l * r6.l), r1 = (a1+= r7.h * r6.h) (ISS2)|| [i1] = r3; + r4 = (a0 = r6.l * r7.l), r5 = (a1 += r6.h * r7.h)|| [i1++] = r3; + R7 = (A1 += r3.h * r5.H), R6 = (A0 -= r3.l * r5.l)|| [i1--] = r3; + r5 = (a1 -= r6.h * r7.h), a0 += r6.l * r7.l|| [i2] = r0; + R3 = (A1 = r6.h * R7.h), R2 = (A0 = R6.l * r7.l)|| [i2++] = r0; + R5 = (A1 = r3.h * r7.h) (M), r4 = (A0 += R3.l * r7.l) (fu)|| [i2--] = R0; + R3 = a1, r2 = (a0 += r0.l *r1.l) (s2rnd)|| [i3] = R7; + r1 = (a1 += r3.h * r2.h), r0 = (a0 = r3.l * r2.l) (is)|| [i3++] = R7; + + R0 = - R1 (V)|| [i3--] = R6; + r7 = - r2 (v)|| [p0++p1] = R0; + + R7 = Pack (r0.h, r1.l)|| [p0++p1] = R3; + r6 = PACK (r1.H, r6.H)|| [p0++p2] = r0; + R5 = pack (R2.L, R2.H)|| [p0++p3] = r4; + + (R0, R1) = search R2 (lt)|| r2 = [p0+4]; + (r6, r7) = Search r0 (LE)|| r5 = [p0--]; + (r3, r6) = SEARCH r1 (Gt)|| r0 = [p0+20]; + (r4, R5) = sEARch r3 (gE)|| r1 = [p0++]; diff --git a/gas/testsuite/gas/bfin/parallel4.s b/gas/testsuite/gas/bfin/parallel4.s index 899050d45dc..0a5005a112b 100644 --- a/gas/testsuite/gas/bfin/parallel4.s +++ b/gas/testsuite/gas/bfin/parallel4.s @@ -1,43 +1,43 @@ - .section .text; - R7 = Align8 (r5, r2) || [i0] = r0; - R5 = ALIGN16 (R0, R1) || [i0++] = r0; - r2 = ALIGN24 (r5, r0) || [i0--] = r0; - - DISAlgnExcpt || [i1] = r0; - - R5 = Byteop3p (r1:0, r3:2) (lO) - || [i1++] = r0; - R0 = BYTEOP3P (R1:0, R3:2) (HI) || // comment test - [i1--] = r0; - R1 = byteop3p (r1:0, r3:2) (LO, r) || [i2] = r0; - r2 = ByteOp3P (r1:0, R3:2) (hi, R) || [i2++] = r0; - - R5 = A1.l + A1.h, R2 = a0.l + a0.h || [i2--] = r0; - - (r2, r3) = BYTEOP16P (R1:0, R3:2) || [i3] = r0; - (R6, R0) = byteop16p (r1:0, r3:2) (r) || [i3++] = r0; - - R7 = BYTEOP1P (R1:0, R3:2) (t) || [i3--] = r0; - r2 = byteop1p (r1:0, r3:2) (t) || [p0] = r0; - R3 = ByteOp1P (r1:0, R3:2) (R) || [p0++] = r0; - r7 = byteOP1P (R1:0, r3:2) (T, r) || [p0--] = r0; - - R0 = BYTEOP2P (R1:0, R3:2) (RNDL) || [p1] = r0; - r1 = byteop2p (r1:0, r3:2) (rndh) || [p1++] = r0; - R2 = Byteop2p (R1:0, R3:2) (tL) || [p1--] = r0; - R3 = Byteop2p (r1:0, r3:2) (TH) || [p2] = r0; - r4 = ByTEOP2P (r1:0, R3:2) (Rndl, R) || [p2++] = r0; - R5 = byTeOp2p (R1:0, r3:2) (rndH, r) || [p2--] = r0; - r6 = BYTEop2p (r1:0, r3:2) (tl, R) || [p3] = r0; - R7 = byteop2p (r1:0, R3:2) (TH, r) || [p3++] = r0; - - R5 = BytePack (R0, R3) || [p3--] = r0; - - (R6, R2) = ByteOp16M (r1:0, r3:2) || [p4] = r0; - (r0, r5) = byteop16m (R1:0, R3:2) (r) || [p4++] = r0; - - saa (r1:0, r3:2) || [p4--] = r0; - SAA (R1:0, R3:2) (r) || [p5] = r0; - - (R7, R2) = byteunpack R1:0 || [p5++] = r0; - (R6, R4) = BYTEUNPACK r3:2 (R) || [p5--] = r0; + .section .text; + R7 = Align8 (r5, r2) || [i0] = r0; + R5 = ALIGN16 (R0, R1) || [i0++] = r0; + r2 = ALIGN24 (r5, r0) || [i0--] = r0; + + DISAlgnExcpt || [i1] = r0; + + R5 = Byteop3p (r1:0, r3:2) (lO) + || [i1++] = r0; + R0 = BYTEOP3P (R1:0, R3:2) (HI) || // comment test + [i1--] = r0; + R1 = byteop3p (r1:0, r3:2) (LO, r) || [i2] = r0; + r2 = ByteOp3P (r1:0, R3:2) (hi, R) || [i2++] = r0; + + R5 = A1.l + A1.h, R2 = a0.l + a0.h || [i2--] = r0; + + (r2, r3) = BYTEOP16P (R1:0, R3:2) || [i3] = r0; + (R6, R0) = byteop16p (r1:0, r3:2) (r) || [i3++] = r0; + + R7 = BYTEOP1P (R1:0, R3:2) (t) || [i3--] = r0; + r2 = byteop1p (r1:0, r3:2) (t) || [p0] = r0; + R3 = ByteOp1P (r1:0, R3:2) (R) || [p0++] = r0; + r7 = byteOP1P (R1:0, r3:2) (T, r) || [p0--] = r0; + + R0 = BYTEOP2P (R1:0, R3:2) (RNDL) || [p1] = r0; + r1 = byteop2p (r1:0, r3:2) (rndh) || [p1++] = r0; + R2 = Byteop2p (R1:0, R3:2) (tL) || [p1--] = r0; + R3 = Byteop2p (r1:0, r3:2) (TH) || [p2] = r0; + r4 = ByTEOP2P (r1:0, R3:2) (Rndl, R) || [p2++] = r0; + R5 = byTeOp2p (R1:0, r3:2) (rndH, r) || [p2--] = r0; + r6 = BYTEop2p (r1:0, r3:2) (tl, R) || [p3] = r0; + R7 = byteop2p (r1:0, R3:2) (TH, r) || [p3++] = r0; + + R5 = BytePack (R0, R3) || [p3--] = r0; + + (R6, R2) = ByteOp16M (r1:0, r3:2) || [p4] = r0; + (r0, r5) = byteop16m (R1:0, R3:2) (r) || [p4++] = r0; + + saa (r1:0, r3:2) || [p4--] = r0; + SAA (R1:0, R3:2) (r) || [p5] = r0; + + (R7, R2) = byteunpack R1:0 || [p5++] = r0; + (R6, R4) = BYTEUNPACK r3:2 (R) || [p5--] = r0; diff --git a/gas/testsuite/gas/bfin/shift2.s b/gas/testsuite/gas/bfin/shift2.s index 69377bcd101..99115a65b7f 100755 --- a/gas/testsuite/gas/bfin/shift2.s +++ b/gas/testsuite/gas/bfin/shift2.s @@ -1,290 +1,290 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//9 SHIFT/ROTATE OPERATIONS -// - -//Preg = ( Preg + Preg ) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */ -P0 = (P0+P0)<<1; -P0 = (P0+P1)<<1; -P2 = (P2+P0)<<1; -P1 = (P1+P2)<<1; - -//P0 = (P2+P0)<<1; - -//Preg = ( Preg + Preg ) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */ -P0 = (P0+P0)<<2; -P0 = (P0+P1)<<2; -P2 = (P2+P0)<<2; -P1 = (P1+P2)<<2; - -//P0 = (P2+P0)<<2; - -//Dreg = (Dreg + Dreg) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */ -R0 = (R0+R0)<<1; -R0 = (R0+R1)<<1; -R2 = (R2+R0)<<1; -R1 = (R1+R2)<<1; - -//R0 = (R2+R0)<<1; - - -//Dreg = (Dreg + Dreg) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */ -R0 = (R0+R0)<<2; -R0 = (R0+R1)<<2; -R2 = (R2+R0)<<2; -R1 = (R1+R2)<<2; - -//R0 = (R2+R0)<<2; - -//Preg = Preg + ( Preg << 1 ) ; /* adder_pntr + (src_pntr x 2) (a) */ -P0 = P0 + (P0 << 1); -P0 = P0 + (P1 << 1); -P0 = P0 + (P2 << 1); -P0 = P1 + (P2 << 1); -P0 = P2 + (P3 << 1); -P1 = P0 + (P0 << 1); -P1 = P0 + (P1 << 1); -P1 = P0 + (P2 << 1); -P1 = P1 + (P2 << 1); -P1 = P2 + (P3 << 1); - -//Preg = Preg + ( Preg << 2 ) ; /* adder_pntr + (src_pntr x 4) (a) */ -P0 = P0 + (P0 << 2); -P0 = P0 + (P1 << 2); -P0 = P0 + (P2 << 2); -P0 = P1 + (P2 << 2); -P0 = P2 + (P3 << 2); -P1 = P0 + (P0 << 2); -P1 = P0 + (P1 << 2); -P1 = P0 + (P2 << 2); -P1 = P1 + (P2 << 2); -P1 = P2 + (P3 << 2); - -//Dreg >>>= uimm5 ; /* arithmetic right shift (a) */ -R0 >>>= 0; -R0 >>>= 31; -R0 >>>= 5; -R5 >>>= 0; -R5 >>>= 31; -R5 >>>= 5; - -//Dreg <<= uimm5 ; /* logical left shift (a) */ -R0 <<= 0; -R0 <<= 31; -R0 <<= 5; -R5 <<= 0; -R5 <<= 31; -R5 <<= 5; -//Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */ -R0.L = R0.L >>> 0; -R0.L = R0.L >>> 15; -R0.L = R0.H >>> 0; -R0.L = R0.H >>> 15; -R0.H = R0.L >>> 0; -R0.H = R0.L >>> 15; -R0.H = R0.H >>> 0; -R0.H = R0.H >>> 15; - -R0.L = R1.L >>> 0; -R0.L = R1.L >>> 15; -R0.L = R1.H >>> 0; -R0.L = R1.H >>> 15; -R0.H = R1.L >>> 0; -R0.H = R1.L >>> 15; -R0.H = R1.H >>> 0; -R0.H = R1.H >>> 15; - -R0.L = R7.L >>> 0; -R1.L = R6.L >>> 15; -R2.L = R5.H >>> 0; -R3.L = R4.H >>> 15; -R4.H = R3.L >>> 0; -R5.H = R2.L >>> 15; -R6.H = R1.H >>> 0; -R7.H = R0.H >>> 15; - -//Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */ -R0.L = R0.L << 0(S); -R0.L = R0.L << 15(S); -R0.L = R0.H << 0(S); -R0.L = R0.H << 15(S); -R0.H = R0.L << 0(S); -R0.H = R0.L << 15(S); -R0.H = R0.H << 0(S); -R0.H = R0.H << 15(S); - -R0.L = R1.L << 0(S); -R0.L = R1.L << 15(S); -R0.L = R1.H << 0(S); -R0.L = R1.H << 15(S); -R0.H = R1.L << 0(S); -R0.H = R1.L << 15(S); -R0.H = R1.H << 0(S); -R0.H = R1.H << 15(S); - -R0.L = R7.L << 0(S); -R1.L = R6.L << 15(S); -R2.L = R5.H << 0(S); -R3.L = R4.H << 15(S); -R4.H = R3.L << 0(S); -R5.H = R2.L << 15(S); -R6.H = R1.H << 0(S); -R7.H = R0.H << 15(S); -//Dreg = Dreg >>> uimm5 ; /* arithmetic right shift (b) */ -R0 = R0 >>> 0; -R0 = R0 >>> 31; -R0 = R1 >>> 0; -R0 = R1 >>> 31; -R7 = R0 >>> 0; -R6 = R1 >>> 31; -R5 = R2 >>> 0; -R4 = R3 >>> 31; -R3 = R4 >>> 0; -R2 = R5 >>> 31; -R1 = R6 >>> 0; -R0 = R7 >>> 31; - -//Dreg = Dreg << uimm5 (S) ; /* arithmetic left shift (b) */ -R0 = R0 << 0(S); -R0 = R0 << 31(S); -R0 = R1 << 0(S); -R0 = R1 << 31(S); -R7 = R0 << 0(S); -R6 = R1 << 31(S); -R5 = R2 << 0(S); -R4 = R3 << 31(S); -R3 = R4 << 0(S); -R2 = R5 << 31(S); -R1 = R6 << 0(S); -R0 = R7 << 31(S); -//A0 = A0 >>> uimm5 ; /* arithmetic right shift (b) */ -A0 = A0 >>> 0; -A0 = A0 >>> 15; -A0 = A0 >>> 31; - -//A0 = A0 << uimm5 ; /* logical left shift (b) */ -A0 = A0 << 0; -A0 = A0 << 15; -A0 = A0 << 31; - -//A1 = A1 >>> uimm5 ; /* arithmetic right shift (b) */ -A1 = A1 >>> 0; -A1 = A1 >>> 15; -A1 = A1 >>> 31; - -//A1 = A1 << uimm5 ; /* logical left shift (b) */ -A1 = A1 << 0; -A1 = A1 << 15; -A1 = A1 << 31; - -//Dreg >>>= Dreg ; /* arithmetic right shift (a) */ -R0 >>>= R0; -R0 >>>= R1; -R1 >>>= R0; -R1 >>>= R7; - -//Dreg <<= Dreg ; /* logical left shift (a) */ -R0 <<= R0; -R0 <<= R1; -R1 <<= R0; -R1 <<= R7; - -//Dreg_lo_hi = ASHIFT Dreg_lo_hi BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */ -r3.l = ashift r0.h by r7.l ; /* shift, half-word */ -r3.h = ashift r0.l by r7.l ; -r3.h = ashift r0.h by r7.l ; -r3.l = ashift r0.l by r7.l ; -r3.l = ashift r0.h by r7.l(s) ; /* shift, half-word, saturated */ -r3.h = ashift r0.l by r7.l(s) ; /* shift, half-word, saturated */ -r3.h = ashift r0.h by r7.l(s) ; -r3.l = ashift r0.l by r7.l (s) ; - -//Dreg = ASHIFT Dreg BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */ -r4 = ashift r2 by r7.l ; /* shift, word */ -r4 = ashift r2 by r7.l (s) ; /* shift, word, saturated */ - -//A0 = ASHIFT A0 BY Dreg_lo ; /* arithmetic right shift (b)*/ -A0 = ashift A0 by r7.l ; /* shift, Accumulator */ - -//A1 = ASHIFT A1 BY Dreg_lo ; /* arithmetic right shift (b)*/ -A1 = ashift A1 by r7.l ; /* shift, Accumulator */ - -p3 = p2 >> 1 ; /* pointer right shift by 1 */ -p3 = p3 >> 2 ; /* pointer right shift by 2 */ -p4 = p5 << 1 ; /* pointer left shift by 1 */ -p0 = p1 << 2 ; /* pointer left shift by 2 */ -r3 >>= 17 ; /* data right shift */ -r3 <<= 17 ; /* data left shift */ -r3.l = r0.l >> 4 ; /* data right shift, half-word register */ -r3.l = r0.h >> 4 ; /* same as above; half-word register combinations are arbitrary */ -r3.h = r0.l << 12 ; /* data left shift, half-word register */ -r3.h = r0.h << 14 ; /* same as above; half-word register combinations are arbitrary */ - -r3 = r6 >> 4 ; /* right shift, 32-bit word */ -r3 = r6 << 4 ; /* left shift, 32-bit word */ - -a0 = a0 >> 7 ; /* Accumulator right shift */ -a1 = a1 >> 25 ; /* Accumulator right shift */ -a0 = a0 << 7 ; /* Accumulator left shift */ -a1 = a1 << 14 ; /* Accumulator left shift */ - -r3 >>= r0 ; /* data right shift */ -r3 <<= r1 ; /* data left shift */ - -r3.l = lshift r0.l by r2.l ; /* shift direction controlled by sign of R2.L */ -r3.h = lshift r0.l by r2.l ; - -a0 = lshift a0 by r7.l ; -a1 = lshift a1 by r7.l ; - -r4 = rot r1 by 31 ; /* rotate left */ -r4 = rot r1 by -32 ; /* rotate right */ -r4 = rot r1 by 5 ; /* rotate right */ - -a0 = rot a0 by 22 ; /* rotate Accumulator left */ -a0 = rot a0 by -32 ; /* rotate Accumulator left */ -a0 = rot a0 by 31 ; /* rotate Accumulator left */ - -a1 = rot a1 by -32 ; /* rotate Accumulator right */ -a1 = rot a1 by 31 ; /* rotate Accumulator right */ -a1 = rot a1 by 22 ; /* rotate Accumulator right */ - -r4 = rot r1 by r2.l ; -a0 = rot a0 by r3.l ; -a1 = rot a1 by r7.l ; - -r0.l = r1.l << 0; -r0.l = r1.l << 1; -r0.l = r1.l << 2; -r0.l = r1.l << 4; -r0.l = r1.l >> 0; -r0.l = r1.l >> 1; -r0.l = r1.l >> 2; -r0.l = r1.l >> 4; -r0.l = r1.l >>> 1; -r0.l = r1.l >>> 2; -r0.l = r1.l >>> 4; - -r0.l = r1.h << 0; -r0.l = r1.h << 1; -r0.l = r1.h << 2; -r0.l = r1.h << 4; -r0.l = r1.h >> 0; -r0.l = r1.h >> 1; -r0.l = r1.h >> 2; -r0.l = r1.h >> 4; -r0.l = r1.h >>> 1; -r0.l = r1.h >>> 2; -r0.l = r1.h >>> 4; - -r0.l = r1.h << 0 (S); -r0.l = r1.h << 1 (S); -r0.l = r1.h << 2 (S); -r0.l = r1.h << 4 (S); -r0.l = r1.h >>> 1 (S); -r0.l = r1.h >>> 2 (S); -r0.l = r1.h >>> 4 (S); - + +.EXTERN MY_LABEL2; +.section .text; + +// +//9 SHIFT/ROTATE OPERATIONS +// + +//Preg = ( Preg + Preg ) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */ +P0 = (P0+P0)<<1; +P0 = (P0+P1)<<1; +P2 = (P2+P0)<<1; +P1 = (P1+P2)<<1; + +//P0 = (P2+P0)<<1; + +//Preg = ( Preg + Preg ) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */ +P0 = (P0+P0)<<2; +P0 = (P0+P1)<<2; +P2 = (P2+P0)<<2; +P1 = (P1+P2)<<2; + +//P0 = (P2+P0)<<2; + +//Dreg = (Dreg + Dreg) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */ +R0 = (R0+R0)<<1; +R0 = (R0+R1)<<1; +R2 = (R2+R0)<<1; +R1 = (R1+R2)<<1; + +//R0 = (R2+R0)<<1; + + +//Dreg = (Dreg + Dreg) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */ +R0 = (R0+R0)<<2; +R0 = (R0+R1)<<2; +R2 = (R2+R0)<<2; +R1 = (R1+R2)<<2; + +//R0 = (R2+R0)<<2; + +//Preg = Preg + ( Preg << 1 ) ; /* adder_pntr + (src_pntr x 2) (a) */ +P0 = P0 + (P0 << 1); +P0 = P0 + (P1 << 1); +P0 = P0 + (P2 << 1); +P0 = P1 + (P2 << 1); +P0 = P2 + (P3 << 1); +P1 = P0 + (P0 << 1); +P1 = P0 + (P1 << 1); +P1 = P0 + (P2 << 1); +P1 = P1 + (P2 << 1); +P1 = P2 + (P3 << 1); + +//Preg = Preg + ( Preg << 2 ) ; /* adder_pntr + (src_pntr x 4) (a) */ +P0 = P0 + (P0 << 2); +P0 = P0 + (P1 << 2); +P0 = P0 + (P2 << 2); +P0 = P1 + (P2 << 2); +P0 = P2 + (P3 << 2); +P1 = P0 + (P0 << 2); +P1 = P0 + (P1 << 2); +P1 = P0 + (P2 << 2); +P1 = P1 + (P2 << 2); +P1 = P2 + (P3 << 2); + +//Dreg >>>= uimm5 ; /* arithmetic right shift (a) */ +R0 >>>= 0; +R0 >>>= 31; +R0 >>>= 5; +R5 >>>= 0; +R5 >>>= 31; +R5 >>>= 5; + +//Dreg <<= uimm5 ; /* logical left shift (a) */ +R0 <<= 0; +R0 <<= 31; +R0 <<= 5; +R5 <<= 0; +R5 <<= 31; +R5 <<= 5; +//Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */ +R0.L = R0.L >>> 0; +R0.L = R0.L >>> 15; +R0.L = R0.H >>> 0; +R0.L = R0.H >>> 15; +R0.H = R0.L >>> 0; +R0.H = R0.L >>> 15; +R0.H = R0.H >>> 0; +R0.H = R0.H >>> 15; + +R0.L = R1.L >>> 0; +R0.L = R1.L >>> 15; +R0.L = R1.H >>> 0; +R0.L = R1.H >>> 15; +R0.H = R1.L >>> 0; +R0.H = R1.L >>> 15; +R0.H = R1.H >>> 0; +R0.H = R1.H >>> 15; + +R0.L = R7.L >>> 0; +R1.L = R6.L >>> 15; +R2.L = R5.H >>> 0; +R3.L = R4.H >>> 15; +R4.H = R3.L >>> 0; +R5.H = R2.L >>> 15; +R6.H = R1.H >>> 0; +R7.H = R0.H >>> 15; + +//Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */ +R0.L = R0.L << 0(S); +R0.L = R0.L << 15(S); +R0.L = R0.H << 0(S); +R0.L = R0.H << 15(S); +R0.H = R0.L << 0(S); +R0.H = R0.L << 15(S); +R0.H = R0.H << 0(S); +R0.H = R0.H << 15(S); + +R0.L = R1.L << 0(S); +R0.L = R1.L << 15(S); +R0.L = R1.H << 0(S); +R0.L = R1.H << 15(S); +R0.H = R1.L << 0(S); +R0.H = R1.L << 15(S); +R0.H = R1.H << 0(S); +R0.H = R1.H << 15(S); + +R0.L = R7.L << 0(S); +R1.L = R6.L << 15(S); +R2.L = R5.H << 0(S); +R3.L = R4.H << 15(S); +R4.H = R3.L << 0(S); +R5.H = R2.L << 15(S); +R6.H = R1.H << 0(S); +R7.H = R0.H << 15(S); +//Dreg = Dreg >>> uimm5 ; /* arithmetic right shift (b) */ +R0 = R0 >>> 0; +R0 = R0 >>> 31; +R0 = R1 >>> 0; +R0 = R1 >>> 31; +R7 = R0 >>> 0; +R6 = R1 >>> 31; +R5 = R2 >>> 0; +R4 = R3 >>> 31; +R3 = R4 >>> 0; +R2 = R5 >>> 31; +R1 = R6 >>> 0; +R0 = R7 >>> 31; + +//Dreg = Dreg << uimm5 (S) ; /* arithmetic left shift (b) */ +R0 = R0 << 0(S); +R0 = R0 << 31(S); +R0 = R1 << 0(S); +R0 = R1 << 31(S); +R7 = R0 << 0(S); +R6 = R1 << 31(S); +R5 = R2 << 0(S); +R4 = R3 << 31(S); +R3 = R4 << 0(S); +R2 = R5 << 31(S); +R1 = R6 << 0(S); +R0 = R7 << 31(S); +//A0 = A0 >>> uimm5 ; /* arithmetic right shift (b) */ +A0 = A0 >>> 0; +A0 = A0 >>> 15; +A0 = A0 >>> 31; + +//A0 = A0 << uimm5 ; /* logical left shift (b) */ +A0 = A0 << 0; +A0 = A0 << 15; +A0 = A0 << 31; + +//A1 = A1 >>> uimm5 ; /* arithmetic right shift (b) */ +A1 = A1 >>> 0; +A1 = A1 >>> 15; +A1 = A1 >>> 31; + +//A1 = A1 << uimm5 ; /* logical left shift (b) */ +A1 = A1 << 0; +A1 = A1 << 15; +A1 = A1 << 31; + +//Dreg >>>= Dreg ; /* arithmetic right shift (a) */ +R0 >>>= R0; +R0 >>>= R1; +R1 >>>= R0; +R1 >>>= R7; + +//Dreg <<= Dreg ; /* logical left shift (a) */ +R0 <<= R0; +R0 <<= R1; +R1 <<= R0; +R1 <<= R7; + +//Dreg_lo_hi = ASHIFT Dreg_lo_hi BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */ +r3.l = ashift r0.h by r7.l ; /* shift, half-word */ +r3.h = ashift r0.l by r7.l ; +r3.h = ashift r0.h by r7.l ; +r3.l = ashift r0.l by r7.l ; +r3.l = ashift r0.h by r7.l(s) ; /* shift, half-word, saturated */ +r3.h = ashift r0.l by r7.l(s) ; /* shift, half-word, saturated */ +r3.h = ashift r0.h by r7.l(s) ; +r3.l = ashift r0.l by r7.l (s) ; + +//Dreg = ASHIFT Dreg BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */ +r4 = ashift r2 by r7.l ; /* shift, word */ +r4 = ashift r2 by r7.l (s) ; /* shift, word, saturated */ + +//A0 = ASHIFT A0 BY Dreg_lo ; /* arithmetic right shift (b)*/ +A0 = ashift A0 by r7.l ; /* shift, Accumulator */ + +//A1 = ASHIFT A1 BY Dreg_lo ; /* arithmetic right shift (b)*/ +A1 = ashift A1 by r7.l ; /* shift, Accumulator */ + +p3 = p2 >> 1 ; /* pointer right shift by 1 */ +p3 = p3 >> 2 ; /* pointer right shift by 2 */ +p4 = p5 << 1 ; /* pointer left shift by 1 */ +p0 = p1 << 2 ; /* pointer left shift by 2 */ +r3 >>= 17 ; /* data right shift */ +r3 <<= 17 ; /* data left shift */ +r3.l = r0.l >> 4 ; /* data right shift, half-word register */ +r3.l = r0.h >> 4 ; /* same as above; half-word register combinations are arbitrary */ +r3.h = r0.l << 12 ; /* data left shift, half-word register */ +r3.h = r0.h << 14 ; /* same as above; half-word register combinations are arbitrary */ + +r3 = r6 >> 4 ; /* right shift, 32-bit word */ +r3 = r6 << 4 ; /* left shift, 32-bit word */ + +a0 = a0 >> 7 ; /* Accumulator right shift */ +a1 = a1 >> 25 ; /* Accumulator right shift */ +a0 = a0 << 7 ; /* Accumulator left shift */ +a1 = a1 << 14 ; /* Accumulator left shift */ + +r3 >>= r0 ; /* data right shift */ +r3 <<= r1 ; /* data left shift */ + +r3.l = lshift r0.l by r2.l ; /* shift direction controlled by sign of R2.L */ +r3.h = lshift r0.l by r2.l ; + +a0 = lshift a0 by r7.l ; +a1 = lshift a1 by r7.l ; + +r4 = rot r1 by 31 ; /* rotate left */ +r4 = rot r1 by -32 ; /* rotate right */ +r4 = rot r1 by 5 ; /* rotate right */ + +a0 = rot a0 by 22 ; /* rotate Accumulator left */ +a0 = rot a0 by -32 ; /* rotate Accumulator left */ +a0 = rot a0 by 31 ; /* rotate Accumulator left */ + +a1 = rot a1 by -32 ; /* rotate Accumulator right */ +a1 = rot a1 by 31 ; /* rotate Accumulator right */ +a1 = rot a1 by 22 ; /* rotate Accumulator right */ + +r4 = rot r1 by r2.l ; +a0 = rot a0 by r3.l ; +a1 = rot a1 by r7.l ; + +r0.l = r1.l << 0; +r0.l = r1.l << 1; +r0.l = r1.l << 2; +r0.l = r1.l << 4; +r0.l = r1.l >> 0; +r0.l = r1.l >> 1; +r0.l = r1.l >> 2; +r0.l = r1.l >> 4; +r0.l = r1.l >>> 1; +r0.l = r1.l >>> 2; +r0.l = r1.l >>> 4; + +r0.l = r1.h << 0; +r0.l = r1.h << 1; +r0.l = r1.h << 2; +r0.l = r1.h << 4; +r0.l = r1.h >> 0; +r0.l = r1.h >> 1; +r0.l = r1.h >> 2; +r0.l = r1.h >> 4; +r0.l = r1.h >>> 1; +r0.l = r1.h >>> 2; +r0.l = r1.h >>> 4; + +r0.l = r1.h << 0 (S); +r0.l = r1.h << 1 (S); +r0.l = r1.h << 2 (S); +r0.l = r1.h << 4 (S); +r0.l = r1.h >>> 1 (S); +r0.l = r1.h >>> 2 (S); +r0.l = r1.h >>> 4 (S); + diff --git a/gas/testsuite/gas/bfin/stack2.s b/gas/testsuite/gas/bfin/stack2.s index 5d7f2c23334..0824e7bbbb7 100755 --- a/gas/testsuite/gas/bfin/stack2.s +++ b/gas/testsuite/gas/bfin/stack2.s @@ -1,125 +1,125 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//5 STACK CONTROL -// - -//[ -- SP ] = allreg ; /* predecrement SP (a) */ - -[--SP ] = R0; -[--SP ] = R6; - -[--SP ] = P0; -[--SP ] = P4; - -[--SP ] = I0; -[--SP ] = I1; - -[--SP ] = M0; -[--SP ] = M1; - -[--SP ] = L0; -[--SP ] = L1; - -[--SP ] = B0; -[--SP ] = B1; - -[--SP ] = A0.X; -[--SP ] = A1.X; - -[--SP ] = A0.W; -[--SP ] = A1.W; - -[--SP ] = ASTAT; -[--SP ] = RETS; -[--SP ] = RETI; -[--SP ] = RETX; -[--SP ] = RETN; -[--SP ] = RETE; -[--SP ] = LC0; -[--SP ] = LC1; -[--SP ] = LT0; -[--SP ] = LT1; -[--SP ] = LB0; -[--SP ] = LB1; -[--SP ] = CYCLES; -[--SP ] = CYCLES2; -//[--SP ] = EMUDAT; -[--SP ] = USP; -[--SP ] = SEQSTAT; -[--SP ] = SYSCFG; - - -//[ -- SP ] = ( R7 : Dreglim , P5 : Preglim ) ; /* Dregs and indexed Pregs (a) */ -[--SP ] = ( R7:0, P5:0); - - -//[ -- SP ] = ( R7 : Dreglim ) ; /* Dregs, only (a) */ -[--SP ] = ( R7:0); - -//[ -- SP ] = ( P5 : Preglim ) ; /* indexed Pregs, only (a) */ -[--SP ] = (P5:0); - - -//mostreg = [ SP ++ ] ; /* post-increment SP; does not apply to Data Registers and Pointer Registers (a) */ - -R0= [ SP ++ ] ; -R6= [ SP ++ ] ; - -P0= [ SP ++ ] ; -P4= [ SP ++ ] ; - -I0= [ SP ++ ] ; -I1= [ SP ++ ] ; - -M0= [ SP ++ ] ; -M1= [ SP ++ ] ; - -L0= [ SP ++ ] ; -L1= [ SP ++ ] ; - -B0= [ SP ++ ] ; -B1= [ SP ++ ] ; - -A0.X= [ SP ++ ] ; -A1.X= [ SP ++ ] ; - -A0.W= [ SP ++ ] ; -A1.W= [ SP ++ ] ; - -ASTAT= [ SP ++ ] ; -RETS= [ SP ++ ] ; -RETI= [ SP ++ ] ; -RETX= [ SP ++ ] ; -RETN= [ SP ++ ] ; -RETE= [ SP ++ ] ; -LC0= [ SP ++ ] ; -LC1= [ SP ++ ] ; -LT0= [ SP ++ ] ; -LT1= [ SP ++ ] ; -LB0= [ SP ++ ] ; -LB1= [ SP ++ ] ; -CYCLES= [ SP ++ ] ; -CYCLES2= [ SP ++ ] ; -//EMUDAT= [ SP ++ ] ; -USP= [ SP ++ ] ; -SEQSTAT= [ SP ++ ] ; -SYSCFG= [ SP ++ ] ; - -//( R7 : Dreglim, P5 : Preglim ) = [ SP ++ ] ; /* Dregs and indexed Pregs (a) */ -( R7:0, P5:0) = [ SP++ ]; - -//( R7 : Dreglim ) = [ SP ++ ] ; /* Dregs, only (a) */ -( R7:0) = [ SP++ ]; - -//( P5 : Preglim ) = [ SP ++ ] ; /* indexed Pregs, only (a) */ -( P5:0) = [ SP++ ]; - -//LINK uimm18m4 ; /* allocate a stack frame of specified size (b) */ -LINK 0X0; -LINK 0X8; -LINK 0x3FFFC; - -UNLINK ; /* de-allocate the stack frame (b)*/ + +.EXTERN MY_LABEL2; +.section .text; + +// +//5 STACK CONTROL +// + +//[ -- SP ] = allreg ; /* predecrement SP (a) */ + +[--SP ] = R0; +[--SP ] = R6; + +[--SP ] = P0; +[--SP ] = P4; + +[--SP ] = I0; +[--SP ] = I1; + +[--SP ] = M0; +[--SP ] = M1; + +[--SP ] = L0; +[--SP ] = L1; + +[--SP ] = B0; +[--SP ] = B1; + +[--SP ] = A0.X; +[--SP ] = A1.X; + +[--SP ] = A0.W; +[--SP ] = A1.W; + +[--SP ] = ASTAT; +[--SP ] = RETS; +[--SP ] = RETI; +[--SP ] = RETX; +[--SP ] = RETN; +[--SP ] = RETE; +[--SP ] = LC0; +[--SP ] = LC1; +[--SP ] = LT0; +[--SP ] = LT1; +[--SP ] = LB0; +[--SP ] = LB1; +[--SP ] = CYCLES; +[--SP ] = CYCLES2; +//[--SP ] = EMUDAT; +[--SP ] = USP; +[--SP ] = SEQSTAT; +[--SP ] = SYSCFG; + + +//[ -- SP ] = ( R7 : Dreglim , P5 : Preglim ) ; /* Dregs and indexed Pregs (a) */ +[--SP ] = ( R7:0, P5:0); + + +//[ -- SP ] = ( R7 : Dreglim ) ; /* Dregs, only (a) */ +[--SP ] = ( R7:0); + +//[ -- SP ] = ( P5 : Preglim ) ; /* indexed Pregs, only (a) */ +[--SP ] = (P5:0); + + +//mostreg = [ SP ++ ] ; /* post-increment SP; does not apply to Data Registers and Pointer Registers (a) */ + +R0= [ SP ++ ] ; +R6= [ SP ++ ] ; + +P0= [ SP ++ ] ; +P4= [ SP ++ ] ; + +I0= [ SP ++ ] ; +I1= [ SP ++ ] ; + +M0= [ SP ++ ] ; +M1= [ SP ++ ] ; + +L0= [ SP ++ ] ; +L1= [ SP ++ ] ; + +B0= [ SP ++ ] ; +B1= [ SP ++ ] ; + +A0.X= [ SP ++ ] ; +A1.X= [ SP ++ ] ; + +A0.W= [ SP ++ ] ; +A1.W= [ SP ++ ] ; + +ASTAT= [ SP ++ ] ; +RETS= [ SP ++ ] ; +RETI= [ SP ++ ] ; +RETX= [ SP ++ ] ; +RETN= [ SP ++ ] ; +RETE= [ SP ++ ] ; +LC0= [ SP ++ ] ; +LC1= [ SP ++ ] ; +LT0= [ SP ++ ] ; +LT1= [ SP ++ ] ; +LB0= [ SP ++ ] ; +LB1= [ SP ++ ] ; +CYCLES= [ SP ++ ] ; +CYCLES2= [ SP ++ ] ; +//EMUDAT= [ SP ++ ] ; +USP= [ SP ++ ] ; +SEQSTAT= [ SP ++ ] ; +SYSCFG= [ SP ++ ] ; + +//( R7 : Dreglim, P5 : Preglim ) = [ SP ++ ] ; /* Dregs and indexed Pregs (a) */ +( R7:0, P5:0) = [ SP++ ]; + +//( R7 : Dreglim ) = [ SP ++ ] ; /* Dregs, only (a) */ +( R7:0) = [ SP++ ]; + +//( P5 : Preglim ) = [ SP ++ ] ; /* indexed Pregs, only (a) */ +( P5:0) = [ SP++ ]; + +//LINK uimm18m4 ; /* allocate a stack frame of specified size (b) */ +LINK 0X0; +LINK 0X8; +LINK 0x3FFFC; + +UNLINK ; /* de-allocate the stack frame (b)*/ diff --git a/gas/testsuite/gas/bfin/video2.s b/gas/testsuite/gas/bfin/video2.s index 16b0ff11730..22fb50f3e59 100755 --- a/gas/testsuite/gas/bfin/video2.s +++ b/gas/testsuite/gas/bfin/video2.s @@ -1,220 +1,220 @@ - -.EXTERN MY_LABEL2; -.section .text; - -// -//13 VIDEO PIXEL OPERATIONS -// - -//Dreg = ALIGN8 ( Dreg, Dreg ) ; /* overlay 1 byte (b) */ -R0 = ALIGN8(R0, R0); -R0 = ALIGN8(R0, R1); -R0 = ALIGN8(R1, R0); -R0 = ALIGN8(R1, R1); -R0 = ALIGN8(R1, R2); -R3 = ALIGN8(R4, R5); -R6 = ALIGN8(R7, R0); -R1 = ALIGN8(R2, R3); -R4 = ALIGN8(R5, R6); -R7 = ALIGN8(R0, R1); -R2 = ALIGN8(R3, R4); -R5 = ALIGN8(R6, R7); - -//Dreg = ALIGN16 ( Dreg, Dreg ) ; /* overlay 2 bytes (b) */ -R0 = ALIGN16(R0, R0); -R0 = ALIGN16(R0, R1); -R0 = ALIGN16(R1, R0); -R0 = ALIGN16(R1, R1); -R0 = ALIGN16(R1, R2); -R3 = ALIGN16(R4, R5); -R6 = ALIGN16(R7, R0); -R1 = ALIGN16(R2, R3); -R4 = ALIGN16(R5, R6); -R7 = ALIGN16(R0, R1); -R2 = ALIGN16(R3, R4); -R5 = ALIGN16(R6, R7); - -//Dreg = ALIGN24 ( Dreg, Dreg ) ; /* overlay 3 bytes (b) */ -R0 = ALIGN24(R0, R0); -R0 = ALIGN24(R0, R1); -R0 = ALIGN24(R1, R0); -R0 = ALIGN24(R1, R1); -R0 = ALIGN24(R1, R2); -R3 = ALIGN24(R4, R5); -R6 = ALIGN24(R7, R0); -R1 = ALIGN24(R2, R3); -R4 = ALIGN24(R5, R6); -R7 = ALIGN24(R0, R1); -R2 = ALIGN24(R3, R4); -R5 = ALIGN24(R6, R7); - -DISALGNEXCPT ; /* (b) */ - -/* forward byte order operands */ -//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO) ; /* sum into low bytes (b) */ -//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI) ; /* sum into high bytes (b) */ -/* reverse byte order operands */ -//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO, R) ; /* sum into low bytes (b) */ -//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI, R) ; /* sum into high bytes (b) */ - -r0 = byteop3p (r1:0, r3:2) (lo) ; -r1 = byteop3p (r1:0, r3:2) (hi) ; -r2 = byteop3p (r1:0, r3:2) (lo, r) ; -r3 = byteop3p (r1:0, r3:2) (hi, r) ; -r4 = byteop3p (r3:2, r1:0) (lo) ; -r5 = byteop3p (r3:2, r1:0) (hi) ; -r6 = byteop3p (r3:2, r1:0) (lo, r) ; -r7 = byteop3p (r3:2, r1:0) (hi, r) ; - -//Dreg = A1.L + A1.H, Dreg = A0.L + A0.H ; /* (b) */ - -R0 = A1.L + A1.H, R0= A0.L + A0.H ; -R0 = A1.L + A1.H, R1= A0.L + A0.H ; -R2 = A1.L + A1.H, R3= A0.L + A0.H ; -R4 = A1.L + A1.H, R5= A0.L + A0.H ; -R6 = A1.L + A1.H, R7= A0.L + A0.H ; - -/* forward byte order operands */ -//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) ; /* (b) */ -(r7,r0) = BYTEOP16P ( r3:2,r1:0 ) ; -(r1,r2) = byteop16p (r3:2,r1:0) ; -(r0,r1) = BYTEOP16P ( r3:2,r1:0 ) ; -(r2,r3) = byteop16p (r3:2,r1:0) ; -(r7,r0) = BYTEOP16P (r1:0, r3:2) ; -(r1,r2) = byteop16p (r1:0,r3:2) ; -(r0,r1) = BYTEOP16P (r1:0, r3:2) ; -(r2,r3) = byteop16p (r1:0,r3:2) ; - -/* reverse byte order operands */ -//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) (R); /* (b) */ -(r7,r0) = BYTEOP16P ( r3:2,r1:0 )(r) ; -(r1,r2) = byteop16p (r3:2,r1:0)(r) ; -(r0,r1) = BYTEOP16P ( r3:2,r1:0 )(r) ; -(r2,r3) = byteop16p (r3:2,r1:0)(r) ; -(r7,r0) = BYTEOP16P (r1:0, r3:2)(r) ; -(r1,r2) = byteop16p (r1:0,r3:2)(r) ; -(r0,r1) = BYTEOP16P (r1:0, r3:2)(r) ; -(r2,r3) = byteop16p (r1:0,r3:2)(r) ; - -/* forward byte order operands */ -//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) ; /* (b) */ -//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T) ; /* truncated (b)*/ -/* reverse byte order operands */ -//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R) ; /* (b) */ -//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R) ; /* truncated (b) */ - -r3 = byteop1p (r1:0, r3:2) ; -r3 = byteop1p (r1:0, r3:2) (r) ; -r3 = byteop1p (r1:0, r3:2) (t) ; -r3 = byteop1p (r1:0, r3:2) (t,r) ; - -r0 = byteop1p (r3:2,r1:0); -r1 = byteop1p (r3:2,r1:0)(r) ; -r2 = byteop1p (r3:2,r1:0)(t) ; -r3 = byteop1p (r3:2,r1:0)(t,r) ; - -/* forward byte order operands */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL) ; -/* round into low bytes (b) */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH) ; -/* round into high bytes (b) */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL) ; -/* truncate into low bytes (b) */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH) ; -/* truncate into high bytes (b) */ -/* reverse byte order operands */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL, R) ; -/* round into low bytes (b) */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH, R) ; -/* round into high bytes (b) */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL, R) ; -/* truncate into low bytes (b) */ -//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH, R) ; -/* truncate into high bytes (b) */ - -r3 = byteop2p (r1:0, r3:2) (rndl) ; -r3 = byteop2p (r1:0, r3:2) (rndh) ; -r3 = byteop2p (r1:0, r3:2) (tl) ; -r3 = byteop2p (r1:0, r3:2) (th) ; -r3 = byteop2p (r1:0, r3:2) (rndl, r) ; -r3 = byteop2p (r1:0, r3:2) (rndh, r) ; -r3 = byteop2p (r1:0, r3:2) (tl, r) ; -r3 = byteop2p (r1:0, r3:2) (th, r) ; - -r0 = byteop2p (r1:0, r3:2) (rndl) ; -r1 = byteop2p (r1:0, r3:2) (rndh) ; -r2 = byteop2p (r1:0, r3:2) (tl) ; -r3 = byteop2p (r1:0, r3:2) (th) ; -r4 = byteop2p (r1:0, r3:2) (rndl, r) ; -r5 = byteop2p (r1:0, r3:2) (rndh, r) ; -r6 = byteop2p (r1:0, r3:2) (tl, r) ; -r7 = byteop2p (r1:0, r3:2) (th, r) ; - -r0 = byteop2p (r3:2, r3:2) (rndl) ; -r1 = byteop2p (r3:2, r3:2) (rndh) ; -r2 = byteop2p (r3:2, r3:2) (tl) ; -r3 = byteop2p (r3:2, r3:2) (th) ; -r4 = byteop2p (r3:2, r3:2) (rndl, r) ; -r5 = byteop2p (r3:2, r3:2) (rndh, r) ; -r6 = byteop2p (r3:2, r3:2) (tl, r) ; -r7 = byteop2p (r3:2, r3:2) (th, r) ; - -//Dreg = BYTEPACK ( Dreg, Dreg ) ; /* (b) */ -r0 = bytepack (r0,r0) ; -r1 = bytepack (r2,r3) ; -r4 = bytepack (r5,r6) ; -r7 = bytepack (r0,r1) ; -r2 = bytepack (r3,r4) ; -r5 = bytepack (r6,r7) ; - -/* forward byte order operands */ -//(Dreg, Dreg) = BYTEOP16M (Dreg_pair, Dreg_pair) ; /* (b */) -/* reverse byte order operands */ -//(Dreg, Dreg) = BYTEOP16M (Dreg-pair, Dreg-pair) (R) ; /* (b) */ - -(r1,r2)= byteop16m (r3:2,r1:0) ; -(r1,r2)= byteop16m (r3:2,r1:0) (r) ; -(r0,r1)= byteop16m (r3:2,r1:0) ; -(r2,r3)= byteop16m (r3:2,r1:0) (r) ; -(r3,r5)= byteop16m (r3:2,r1:0) ; -(r6,r7)= byteop16m (r3:2,r1:0) (r) ; - -(r1,r2)= byteop16m (r1:0,r1:0) ; -(r1,r2)= byteop16m (r1:0,r1:0) (r) ; -(r0,r1)= byteop16m (r1:0,r1:0) ; -(r2,r3)= byteop16m (r1:0,r1:0) (r) ; -(r3,r5)= byteop16m (r1:0,r1:0) ; -(r6,r7)= byteop16m (r1:0,r1:0) (r) ; - -(r1,r2)= byteop16m (r1:0,r3:2) ; -(r1,r2)= byteop16m (r1:0,r3:2) (r) ; -(r0,r1)= byteop16m (r1:0,r3:2) ; -(r2,r3)= byteop16m (r1:0,r3:2) (r) ; -(r3,r5)= byteop16m (r1:0,r3:2) ; -(r6,r7)= byteop16m (r1:0,r3:2) (r) ; - -(r1,r2)= byteop16m (r3:2,r3:2) ; -(r1,r2)= byteop16m (r3:2,r3:2) (r) ; -(r0,r1)= byteop16m (r3:2,r3:2) ; -(r2,r3)= byteop16m (r3:2,r3:2) (r) ; -(r3,r5)= byteop16m (r3:2,r3:2) ; -(r6,r7)= byteop16m (r3:2,r3:2) (r) ; - -//SAA (Dreg_pair, Dreg_pair) ; /* forward byte order operands (b) */ -//SAA (Dreg_pair, Dreg_pair) (R) ; /* reverse byte order operands (b) */ - -saa(r1:0, r3:2) || r0 = [i0++] || r2 = [i1++] ; /* parallel fill instructions */ -saa (r1:0, r3:2) (R) || r1 = [i0++] || r3 = [i1++] ; /* reverse, parallel fill instructions */ -saa (r1:0, r3:2) ; /* last SAA in a loop, no more fill required */ - -//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair ; /* (b) */ -//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair (R) ; /* reverse source order (b) */ - -(r6,r5) = byteunpack r1:0 ; /* non-reversing sources */ -(r6,r5) = byteunpack r1:0 (R) ; /* reversing sources case */ -(r6,r5) = byteunpack r3:2 ; /* non-reversing sources */ -(r6,r5) = byteunpack r3:2 (R) ; /* reversing sources case */ -(r0,r1) = byteunpack r1:0 ; /* non-reversing sources */ -(r2,r3) = byteunpack r1:0 (R) ; /* reversing sources case */ -(r4,r5) = byteunpack r3:2 ; /* non-reversing sources */ -(r6,r7) = byteunpack r3:2 (R) ; /* reversing sources case */ + +.EXTERN MY_LABEL2; +.section .text; + +// +//13 VIDEO PIXEL OPERATIONS +// + +//Dreg = ALIGN8 ( Dreg, Dreg ) ; /* overlay 1 byte (b) */ +R0 = ALIGN8(R0, R0); +R0 = ALIGN8(R0, R1); +R0 = ALIGN8(R1, R0); +R0 = ALIGN8(R1, R1); +R0 = ALIGN8(R1, R2); +R3 = ALIGN8(R4, R5); +R6 = ALIGN8(R7, R0); +R1 = ALIGN8(R2, R3); +R4 = ALIGN8(R5, R6); +R7 = ALIGN8(R0, R1); +R2 = ALIGN8(R3, R4); +R5 = ALIGN8(R6, R7); + +//Dreg = ALIGN16 ( Dreg, Dreg ) ; /* overlay 2 bytes (b) */ +R0 = ALIGN16(R0, R0); +R0 = ALIGN16(R0, R1); +R0 = ALIGN16(R1, R0); +R0 = ALIGN16(R1, R1); +R0 = ALIGN16(R1, R2); +R3 = ALIGN16(R4, R5); +R6 = ALIGN16(R7, R0); +R1 = ALIGN16(R2, R3); +R4 = ALIGN16(R5, R6); +R7 = ALIGN16(R0, R1); +R2 = ALIGN16(R3, R4); +R5 = ALIGN16(R6, R7); + +//Dreg = ALIGN24 ( Dreg, Dreg ) ; /* overlay 3 bytes (b) */ +R0 = ALIGN24(R0, R0); +R0 = ALIGN24(R0, R1); +R0 = ALIGN24(R1, R0); +R0 = ALIGN24(R1, R1); +R0 = ALIGN24(R1, R2); +R3 = ALIGN24(R4, R5); +R6 = ALIGN24(R7, R0); +R1 = ALIGN24(R2, R3); +R4 = ALIGN24(R5, R6); +R7 = ALIGN24(R0, R1); +R2 = ALIGN24(R3, R4); +R5 = ALIGN24(R6, R7); + +DISALGNEXCPT ; /* (b) */ + +/* forward byte order operands */ +//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO) ; /* sum into low bytes (b) */ +//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI) ; /* sum into high bytes (b) */ +/* reverse byte order operands */ +//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO, R) ; /* sum into low bytes (b) */ +//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI, R) ; /* sum into high bytes (b) */ + +r0 = byteop3p (r1:0, r3:2) (lo) ; +r1 = byteop3p (r1:0, r3:2) (hi) ; +r2 = byteop3p (r1:0, r3:2) (lo, r) ; +r3 = byteop3p (r1:0, r3:2) (hi, r) ; +r4 = byteop3p (r3:2, r1:0) (lo) ; +r5 = byteop3p (r3:2, r1:0) (hi) ; +r6 = byteop3p (r3:2, r1:0) (lo, r) ; +r7 = byteop3p (r3:2, r1:0) (hi, r) ; + +//Dreg = A1.L + A1.H, Dreg = A0.L + A0.H ; /* (b) */ + +R0 = A1.L + A1.H, R0= A0.L + A0.H ; +R0 = A1.L + A1.H, R1= A0.L + A0.H ; +R2 = A1.L + A1.H, R3= A0.L + A0.H ; +R4 = A1.L + A1.H, R5= A0.L + A0.H ; +R6 = A1.L + A1.H, R7= A0.L + A0.H ; + +/* forward byte order operands */ +//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) ; /* (b) */ +(r7,r0) = BYTEOP16P ( r3:2,r1:0 ) ; +(r1,r2) = byteop16p (r3:2,r1:0) ; +(r0,r1) = BYTEOP16P ( r3:2,r1:0 ) ; +(r2,r3) = byteop16p (r3:2,r1:0) ; +(r7,r0) = BYTEOP16P (r1:0, r3:2) ; +(r1,r2) = byteop16p (r1:0,r3:2) ; +(r0,r1) = BYTEOP16P (r1:0, r3:2) ; +(r2,r3) = byteop16p (r1:0,r3:2) ; + +/* reverse byte order operands */ +//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) (R); /* (b) */ +(r7,r0) = BYTEOP16P ( r3:2,r1:0 )(r) ; +(r1,r2) = byteop16p (r3:2,r1:0)(r) ; +(r0,r1) = BYTEOP16P ( r3:2,r1:0 )(r) ; +(r2,r3) = byteop16p (r3:2,r1:0)(r) ; +(r7,r0) = BYTEOP16P (r1:0, r3:2)(r) ; +(r1,r2) = byteop16p (r1:0,r3:2)(r) ; +(r0,r1) = BYTEOP16P (r1:0, r3:2)(r) ; +(r2,r3) = byteop16p (r1:0,r3:2)(r) ; + +/* forward byte order operands */ +//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) ; /* (b) */ +//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T) ; /* truncated (b)*/ +/* reverse byte order operands */ +//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R) ; /* (b) */ +//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R) ; /* truncated (b) */ + +r3 = byteop1p (r1:0, r3:2) ; +r3 = byteop1p (r1:0, r3:2) (r) ; +r3 = byteop1p (r1:0, r3:2) (t) ; +r3 = byteop1p (r1:0, r3:2) (t,r) ; + +r0 = byteop1p (r3:2,r1:0); +r1 = byteop1p (r3:2,r1:0)(r) ; +r2 = byteop1p (r3:2,r1:0)(t) ; +r3 = byteop1p (r3:2,r1:0)(t,r) ; + +/* forward byte order operands */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL) ; +/* round into low bytes (b) */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH) ; +/* round into high bytes (b) */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL) ; +/* truncate into low bytes (b) */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH) ; +/* truncate into high bytes (b) */ +/* reverse byte order operands */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL, R) ; +/* round into low bytes (b) */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH, R) ; +/* round into high bytes (b) */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL, R) ; +/* truncate into low bytes (b) */ +//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH, R) ; +/* truncate into high bytes (b) */ + +r3 = byteop2p (r1:0, r3:2) (rndl) ; +r3 = byteop2p (r1:0, r3:2) (rndh) ; +r3 = byteop2p (r1:0, r3:2) (tl) ; +r3 = byteop2p (r1:0, r3:2) (th) ; +r3 = byteop2p (r1:0, r3:2) (rndl, r) ; +r3 = byteop2p (r1:0, r3:2) (rndh, r) ; +r3 = byteop2p (r1:0, r3:2) (tl, r) ; +r3 = byteop2p (r1:0, r3:2) (th, r) ; + +r0 = byteop2p (r1:0, r3:2) (rndl) ; +r1 = byteop2p (r1:0, r3:2) (rndh) ; +r2 = byteop2p (r1:0, r3:2) (tl) ; +r3 = byteop2p (r1:0, r3:2) (th) ; +r4 = byteop2p (r1:0, r3:2) (rndl, r) ; +r5 = byteop2p (r1:0, r3:2) (rndh, r) ; +r6 = byteop2p (r1:0, r3:2) (tl, r) ; +r7 = byteop2p (r1:0, r3:2) (th, r) ; + +r0 = byteop2p (r3:2, r3:2) (rndl) ; +r1 = byteop2p (r3:2, r3:2) (rndh) ; +r2 = byteop2p (r3:2, r3:2) (tl) ; +r3 = byteop2p (r3:2, r3:2) (th) ; +r4 = byteop2p (r3:2, r3:2) (rndl, r) ; +r5 = byteop2p (r3:2, r3:2) (rndh, r) ; +r6 = byteop2p (r3:2, r3:2) (tl, r) ; +r7 = byteop2p (r3:2, r3:2) (th, r) ; + +//Dreg = BYTEPACK ( Dreg, Dreg ) ; /* (b) */ +r0 = bytepack (r0,r0) ; +r1 = bytepack (r2,r3) ; +r4 = bytepack (r5,r6) ; +r7 = bytepack (r0,r1) ; +r2 = bytepack (r3,r4) ; +r5 = bytepack (r6,r7) ; + +/* forward byte order operands */ +//(Dreg, Dreg) = BYTEOP16M (Dreg_pair, Dreg_pair) ; /* (b */) +/* reverse byte order operands */ +//(Dreg, Dreg) = BYTEOP16M (Dreg-pair, Dreg-pair) (R) ; /* (b) */ + +(r1,r2)= byteop16m (r3:2,r1:0) ; +(r1,r2)= byteop16m (r3:2,r1:0) (r) ; +(r0,r1)= byteop16m (r3:2,r1:0) ; +(r2,r3)= byteop16m (r3:2,r1:0) (r) ; +(r3,r5)= byteop16m (r3:2,r1:0) ; +(r6,r7)= byteop16m (r3:2,r1:0) (r) ; + +(r1,r2)= byteop16m (r1:0,r1:0) ; +(r1,r2)= byteop16m (r1:0,r1:0) (r) ; +(r0,r1)= byteop16m (r1:0,r1:0) ; +(r2,r3)= byteop16m (r1:0,r1:0) (r) ; +(r3,r5)= byteop16m (r1:0,r1:0) ; +(r6,r7)= byteop16m (r1:0,r1:0) (r) ; + +(r1,r2)= byteop16m (r1:0,r3:2) ; +(r1,r2)= byteop16m (r1:0,r3:2) (r) ; +(r0,r1)= byteop16m (r1:0,r3:2) ; +(r2,r3)= byteop16m (r1:0,r3:2) (r) ; +(r3,r5)= byteop16m (r1:0,r3:2) ; +(r6,r7)= byteop16m (r1:0,r3:2) (r) ; + +(r1,r2)= byteop16m (r3:2,r3:2) ; +(r1,r2)= byteop16m (r3:2,r3:2) (r) ; +(r0,r1)= byteop16m (r3:2,r3:2) ; +(r2,r3)= byteop16m (r3:2,r3:2) (r) ; +(r3,r5)= byteop16m (r3:2,r3:2) ; +(r6,r7)= byteop16m (r3:2,r3:2) (r) ; + +//SAA (Dreg_pair, Dreg_pair) ; /* forward byte order operands (b) */ +//SAA (Dreg_pair, Dreg_pair) (R) ; /* reverse byte order operands (b) */ + +saa(r1:0, r3:2) || r0 = [i0++] || r2 = [i1++] ; /* parallel fill instructions */ +saa (r1:0, r3:2) (R) || r1 = [i0++] || r3 = [i1++] ; /* reverse, parallel fill instructions */ +saa (r1:0, r3:2) ; /* last SAA in a loop, no more fill required */ + +//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair ; /* (b) */ +//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair (R) ; /* reverse source order (b) */ + +(r6,r5) = byteunpack r1:0 ; /* non-reversing sources */ +(r6,r5) = byteunpack r1:0 (R) ; /* reversing sources case */ +(r6,r5) = byteunpack r3:2 ; /* non-reversing sources */ +(r6,r5) = byteunpack r3:2 (R) ; /* reversing sources case */ +(r0,r1) = byteunpack r1:0 ; /* non-reversing sources */ +(r2,r3) = byteunpack r1:0 (R) ; /* reversing sources case */ +(r4,r5) = byteunpack r3:2 ; /* non-reversing sources */ +(r6,r7) = byteunpack r3:2 (R) ; /* reversing sources case */ -- 2.30.2