From a9df772e0e76254ab232876016ec09b1fadbd700 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Fri, 7 Nov 2014 00:04:01 +1300 Subject: [PATCH] i965: Add defines for all new Gen7/8 URB opcodes Tessellation needs to emit URB reads and atomics; Signed-off-by: Chris Forbes Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_defines.h | 8 +++++++- src/mesa/drivers/dri/i965/brw_disasm.c | 18 +++++++++--------- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 3c128aee809..0f7feb38469 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1694,7 +1694,13 @@ enum brw_message_target { #define BRW_URB_OPCODE_WRITE_HWORD 0 #define BRW_URB_OPCODE_WRITE_OWORD 1 -#define GEN8_URB_OPCODE_SIMD8_WRITE 7 +#define BRW_URB_OPCODE_READ_HWORD 2 +#define BRW_URB_OPCODE_READ_OWORD 3 +#define GEN7_URB_OPCODE_ATOMIC_MOV 4 +#define GEN7_URB_OPCODE_ATOMIC_INC 5 +#define GEN8_URB_OPCODE_ATOMIC_ADD 6 +#define GEN8_URB_OPCODE_SIMD8_WRITE 7 +#define GEN8_URB_OPCODE_SIMD8_READ 8 #define BRW_URB_SWIZZLE_NONE 0 #define BRW_URB_SWIZZLE_INTERLEAVE 1 diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index 61be2b04fee..7401e325638 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -572,15 +572,15 @@ static const char *const gen5_urb_opcode[] = { }; static const char *const gen7_urb_opcode[] = { - [0] = "write HWord", - [1] = "write OWord", - [2] = "read HWord", - [3] = "read OWord", - [4] = "atomic mov", /* Gen7+ */ - [5] = "atomic inc", /* Gen7+ */ - [6] = "atomic add", /* Gen8+ */ - [7] = "SIMD8 write", /* Gen8+ */ - [8] = "SIMD8 read", /* Gen8+ */ + [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord", + [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord", + [BRW_URB_OPCODE_READ_HWORD] = "read HWord", + [BRW_URB_OPCODE_READ_OWORD] = "read OWord", + [GEN7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gen7+ */ + [GEN7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gen7+ */ + [GEN8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gen8+ */ + [GEN8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gen8+ */ + [GEN8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gen8+ */ /* [9-15] - reserved */ }; -- 2.30.2