From aa1e4bc360dc65fa369098a4feb9cb01cc221752 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 18 Sep 2022 16:06:37 +0100 Subject: [PATCH] code-morph CR ops to table in power_insn.py put 3/5-bit detection into one of the options to search in mask/val form --- src/openpower/decoder/power_insn.py | 48 ++++++++++++++++------------- 1 file changed, 26 insertions(+), 22 deletions(-) diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 7b4b5237..7733c496 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -1794,6 +1794,32 @@ class RM(BaseRM): rm = rm.ldst_idx search = (int(rm.mode) << 1) | Rc + elif record.svp64.mode is _SVMode.CROP: + # concatenate mode 5-bit with Rc (LSB) then do a mask/map search + # mode 3b mask 3b action(getattr) + table = [(0b000000, 0b111000, "simple"), # simple + (0b001000, 0b111000, "smr"), # mapreduce + (0b100000, 0b100000, "ff5"), # failfirst, 5-bit CR + (0b100001, 0b100001, "ff3"), # failfirst, 3-bit CR + ] + # determine CR type, 5-bit (BA/BB/BT) or 3-bit Field (BF/BFA) + regtype = None + for idx in range(0, 4): + for entry in record.svp64.extra[idx]: + if entry.regtype is _SVExtraRegType.DST: + if regtype is not None: + raise ValueError(record.svp64) + regtype = _RegType(entry.reg) + if regtype is _RegType.CR_REG: + regtype = 0 # 5-bit + elif regtype is _RegType.CR_BIT: + regtype = 1 # 3-bit + else: + raise ValueError(record.svp64) + # finally provide info for search + rm = rm.cr_op + search = (int(rm.mode) << 1) | (regtype or 0) + # look up in table if table is not None: for (val, mask, action) in table: @@ -1801,28 +1827,6 @@ class RM(BaseRM): rm = getattr(rm, action) break - elif record.svp64.mode is _SVMode.CROP: - rm = rm.cr_op - if rm[19] == 0b0: - if rm[21] == 0b0: - rm = rm.simple - else: - rm = rm.smr - else: - regtype = None - for idx in range(0, 4): - for entry in record.svp64.extra[idx]: - if entry.regtype is _SVExtraRegType.DST: - if regtype is not None: - raise ValueError(record.svp64) - regtype = _RegType(entry.reg) - if regtype is _RegType.CR_REG: - rm = rm.ff5 - elif regtype is _RegType.CR_BIT: - rm = rm.ff3 - else: - raise ValueError(record.svp64) - elif record.svp64.mode is _SVMode.BRANCH: if rm[19] == 0b0: if rm[20] == 0b0: -- 2.30.2