From aa322f8ae5be1bbb32ecdacb0984d79c242f4a95 Mon Sep 17 00:00:00 2001 From: Topi Pohjolainen Date: Tue, 12 Apr 2016 00:18:45 +0300 Subject: [PATCH] i965/blorp: Skip uploading state/options not needed for clears In case there is no source it means the program does a simple clear or a resolve. In such case there is no need to program sampling state or enable pixel kill in fragment shader. Signed-off-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 +++++++++---- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 23 +++++++++++++++-------- src/mesa/drivers/dri/i965/gen8_blorp.cpp | 18 +++++++++++++----- 3 files changed, 37 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index cbb435578eb..b741e19abc4 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -692,13 +692,16 @@ gen6_blorp_emit_wm_config(struct brw_context *brw, dw6 |= 0 << GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */ dw6 |= 0 << GEN6_WM_NUM_SF_OUTPUTS_SHIFT; /* No inputs from SF */ if (params->use_wm_prog) { - dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ dw4 |= prog_data->first_curbe_grf << GEN6_WM_DISPATCH_START_GRF_SHIFT_0; dw5 |= GEN6_WM_16_DISPATCH_ENABLE; - dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */ dw5 |= GEN6_WM_DISPATCH_ENABLE; /* We are rendering */ } + if (params->src.mt) { + dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */ + dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ + } + if (params->dst.num_samples > 1) { dw6 |= GEN6_WM_MSRAST_ON_PATTERN; if (prog_data && prog_data->persample_msaa_dispatch) @@ -1044,7 +1047,6 @@ gen6_blorp_exec(struct brw_context *brw, if (params->use_wm_prog) { uint32_t wm_surf_offset_renderbuffer; uint32_t wm_surf_offset_texture = 0; - uint32_t sampler_offset; wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params); intel_miptree_used_for_rendering(params->dst.mt); wm_surf_offset_renderbuffer = @@ -1060,7 +1062,10 @@ gen6_blorp_exec(struct brw_context *brw, gen6_blorp_emit_binding_table(brw, wm_surf_offset_renderbuffer, wm_surf_offset_texture); - sampler_offset = + } + + if (params->src.mt) { + const uint32_t sampler_offset = gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); gen6_blorp_emit_sampler_state_pointers(brw, sampler_offset); } diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 11d075ae903..712291d1999 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -468,10 +468,12 @@ gen7_blorp_emit_wm_config(struct brw_context *brw, dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0; dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5; dw1 |= 0 << GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */ - if (params->use_wm_prog) { - dw1 |= GEN7_WM_KILL_ENABLE; /* TODO: temporarily smash on */ + + if (params->use_wm_prog) dw1 |= GEN7_WM_DISPATCH_ENABLE; /* We are rendering */ - } + + if (params->src.mt) + dw1 |= GEN7_WM_KILL_ENABLE; /* TODO: temporarily smash on */ if (params->dst.num_samples > 1) { dw1 |= GEN7_WM_MSRAST_ON_PATTERN; @@ -527,11 +529,13 @@ gen7_blorp_emit_ps_config(struct brw_context *brw, if (brw->is_haswell) dw4 |= SET_FIELD(1, HSW_PS_SAMPLE_MASK); /* 1 sample for now */ if (params->use_wm_prog) { - dw2 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE; dw5 |= prog_data->first_curbe_grf << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; } + if (params->src.mt) + dw2 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ + dw4 |= params->fast_clear_op; BEGIN_BATCH(8); @@ -791,7 +795,6 @@ gen7_blorp_exec(struct brw_context *brw, uint32_t depthstencil_offset; uint32_t wm_push_const_offset = 0; uint32_t wm_bind_bo_offset = 0; - uint32_t sampler_offset = 0; uint32_t prog_offset = params->get_wm_prog(brw, &prog_data); gen6_emit_3dstate_multisample(brw, params->dst.num_samples); @@ -831,8 +834,6 @@ gen7_blorp_exec(struct brw_context *brw, gen6_blorp_emit_binding_table(brw, wm_surf_offset_renderbuffer, wm_surf_offset_texture); - sampler_offset = - gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); } gen7_blorp_emit_vs_disable(brw); gen7_blorp_emit_hs_disable(brw); @@ -845,11 +846,17 @@ gen7_blorp_exec(struct brw_context *brw, gen7_blorp_emit_wm_config(brw, params, prog_data); if (params->use_wm_prog) { gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); - gen7_blorp_emit_sampler_state_pointers_ps(brw, sampler_offset); gen7_blorp_emit_constant_ps(brw, wm_push_const_offset); } else { gen7_blorp_emit_constant_ps_disable(brw); } + + if (params->src.mt) { + const uint32_t sampler_offset = + gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); + gen7_blorp_emit_sampler_state_pointers_ps(brw, sampler_offset); + } + gen7_blorp_emit_ps_config(brw, params, prog_offset, prog_data); gen7_blorp_emit_cc_viewport(brw); diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.cpp b/src/mesa/drivers/dri/i965/gen8_blorp.cpp index 3c0276fa0e1..8d1b96408cd 100644 --- a/src/mesa/drivers/dri/i965/gen8_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen8_blorp.cpp @@ -379,8 +379,13 @@ gen8_blorp_emit_ps_config(struct brw_context *brw, dw6 |= GEN7_PS_16_DISPATCH_ENABLE; - dw3 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ - dw3 |= 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* Two surfaces */ + if (params->src.mt) { + dw3 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ + dw3 |= 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* Two surfaces */ + } else { + dw3 |= 1 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* One surface */ + } + dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE; dw7 |= prog_data->first_curbe_grf << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; @@ -663,9 +668,12 @@ gen8_blorp_exec(struct brw_context *brw, const brw_blorp_params *params) _3DSTATE_BINDING_TABLE_POINTERS_GS); gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); - const uint32_t sampler_offset = - gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); - gen7_blorp_emit_sampler_state_pointers_ps(brw, sampler_offset); + + if (params->src.mt) { + const uint32_t sampler_offset = + gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); + gen7_blorp_emit_sampler_state_pointers_ps(brw, sampler_offset); + } gen8_emit_3dstate_multisample(brw, params->dst.num_samples); gen6_emit_3dstate_sample_mask(brw, -- 2.30.2