From aa581fcc696f936d337946ed53d49ce90c3423d1 Mon Sep 17 00:00:00 2001 From: Jesse Natalie Date: Mon, 1 Jun 2020 15:46:03 -0700 Subject: [PATCH] nir: Support vec8/vec16 in nir_lower_bit_size Reviewed-by: Gert Wollny Reviewed-by: Alyssa Rosenzweig Reviewed-by: Jason Ekstrand Part-of: --- src/compiler/nir/nir_lower_bit_size.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_lower_bit_size.c b/src/compiler/nir/nir_lower_bit_size.c index 38e3fa9c6c0..a6a2032b010 100644 --- a/src/compiler/nir/nir_lower_bit_size.c +++ b/src/compiler/nir/nir_lower_bit_size.c @@ -39,7 +39,7 @@ lower_instr(nir_builder *bld, nir_alu_instr *alu, unsigned bit_size) bld->cursor = nir_before_instr(&alu->instr); /* Convert each source to the requested bit-size */ - nir_ssa_def *srcs[4] = { NULL, NULL, NULL, NULL }; + nir_ssa_def *srcs[NIR_MAX_VEC_COMPONENTS] = { NULL }; for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++) { nir_ssa_def *src = nir_ssa_for_alu_src(bld, alu, i); @@ -65,7 +65,7 @@ lower_instr(nir_builder *bld, nir_alu_instr *alu, unsigned bit_size) else lowered_dst = nir_ishr(bld, lowered_dst, nir_imm_int(bld, dst_bit_size)); } else { - lowered_dst = nir_build_alu(bld, op, srcs[0], srcs[1], srcs[2], srcs[3]); + lowered_dst = nir_build_alu_src_arr(bld, op, srcs); } -- 2.30.2