From aa737e858050239c263b06d2646f9977876b5ba2 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Sat, 4 May 2019 12:37:36 +0200 Subject: [PATCH] radeonsi: raise the alignment of LDS memory for compute shaders MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This implies that the memory will always be at address 0, which allows LLVM to generate slightly better code. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 3617214ebef..ed2db3d0042 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2217,7 +2217,7 @@ void si_declare_compute_memory(struct si_shader_context *ctx) LLVMArrayType(ctx->i8, lds_size), "compute_lds", AC_ADDR_SPACE_LDS); - LLVMSetAlignment(var, 4); + LLVMSetAlignment(var, 64 * 1024); ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, var, i8p, ""); } -- 2.30.2