From aa78d05a2340852560a9bc965c87ba9fa271dd1a Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Tue, 18 Feb 2020 20:53:26 -0800 Subject: [PATCH] iris: Remove depth cache set tracking and synchronization. The depth cache set is now redundant with the more general seqno matrix-based cache tracking mechanism. Removed as a separate patch for bisectability. Reviewed-by: Kenneth Graunke Part-of: --- src/gallium/drivers/iris/iris_batch.c | 3 --- src/gallium/drivers/iris/iris_batch.h | 7 ------- src/gallium/drivers/iris/iris_blorp.c | 4 ---- src/gallium/drivers/iris/iris_context.h | 1 - src/gallium/drivers/iris/iris_pipe_control.c | 3 +-- src/gallium/drivers/iris/iris_resolve.c | 21 +------------------- 6 files changed, 2 insertions(+), 37 deletions(-) diff --git a/src/gallium/drivers/iris/iris_batch.c b/src/gallium/drivers/iris/iris_batch.c index a6657a373f5..596d83954a7 100644 --- a/src/gallium/drivers/iris/iris_batch.c +++ b/src/gallium/drivers/iris/iris_batch.c @@ -203,8 +203,6 @@ iris_init_batch(struct iris_context *ice, batch->cache.render = _mesa_hash_table_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); - batch->cache.depth = _mesa_set_create(NULL, _mesa_hash_pointer, - _mesa_key_pointer_equal); memset(batch->other_batches, 0, sizeof(batch->other_batches)); @@ -446,7 +444,6 @@ iris_batch_free(struct iris_batch *batch) iris_destroy_hw_context(bufmgr, batch->hw_ctx_id); _mesa_hash_table_destroy(batch->cache.render, NULL); - _mesa_set_destroy(batch->cache.depth, NULL); if (unlikely(INTEL_DEBUG)) gen_batch_decode_ctx_finish(&batch->decoder); diff --git a/src/gallium/drivers/iris/iris_batch.h b/src/gallium/drivers/iris/iris_batch.h index a056730130c..2f053032dd1 100644 --- a/src/gallium/drivers/iris/iris_batch.h +++ b/src/gallium/drivers/iris/iris_batch.h @@ -132,13 +132,6 @@ struct iris_batch { * cache domain that isn't coherent with it (i.e. the sampler). */ struct hash_table *render; - - /** - * Set of struct brw_bo * that have been used as a depth buffer within - * this batchbuffer and would need flushing before being used from - * another cache domain that isn't coherent with it (i.e. the sampler). - */ - struct set *depth; } cache; struct gen_batch_decode_ctx decoder; diff --git a/src/gallium/drivers/iris/iris_blorp.c b/src/gallium/drivers/iris/iris_blorp.c index a9d1e89cd72..49c39e7de51 100644 --- a/src/gallium/drivers/iris/iris_blorp.c +++ b/src/gallium/drivers/iris/iris_blorp.c @@ -372,10 +372,6 @@ iris_blorp_exec(struct blorp_batch *blorp_batch, params->dst.view.format, params->dst.aux_usage); } - if (params->depth.enabled) - iris_depth_cache_add_bo(batch, params->depth.addr.buffer); - if (params->stencil.enabled) - iris_depth_cache_add_bo(batch, params->stencil.addr.buffer); if (params->src.enabled) iris_bo_bump_seqno(params->src.addr.buffer, batch->next_seqno, diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index eac01536334..458e511090f 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -922,7 +922,6 @@ void iris_render_cache_add_bo(struct iris_batch *batch, enum isl_format format, enum isl_aux_usage aux_usage); void iris_cache_flush_for_depth(struct iris_batch *batch, struct iris_bo *bo); -void iris_depth_cache_add_bo(struct iris_batch *batch, struct iris_bo *bo); int iris_get_driver_query_info(struct pipe_screen *pscreen, unsigned index, struct pipe_driver_query_info *info); int iris_get_driver_query_group_info(struct pipe_screen *pscreen, diff --git a/src/gallium/drivers/iris/iris_pipe_control.c b/src/gallium/drivers/iris/iris_pipe_control.c index 74d21c8c589..0aff2e2172d 100644 --- a/src/gallium/drivers/iris/iris_pipe_control.c +++ b/src/gallium/drivers/iris/iris_pipe_control.c @@ -307,8 +307,7 @@ iris_texture_barrier(struct pipe_context *ctx, unsigned flags) struct iris_batch *compute_batch = &ice->batches[IRIS_BATCH_COMPUTE]; if (render_batch->contains_draw || - render_batch->cache.render->entries || - render_batch->cache.depth->entries) { + render_batch->cache.render->entries) { iris_batch_maybe_flush(render_batch, 48); iris_emit_pipe_control_flush(render_batch, "API: texture barrier (1/2)", diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c index 4fd8b57b20e..e0488c985fd 100644 --- a/src/gallium/drivers/iris/iris_resolve.c +++ b/src/gallium/drivers/iris/iris_resolve.c @@ -296,9 +296,6 @@ iris_postdraw_update_resolve_tracking(struct iris_context *ice, zs_surf->u.tex.first_layer, num_layers, ice->state.depth_writes_enabled); } - - if (ice->state.depth_writes_enabled) - iris_depth_cache_add_bo(batch, z_res->bo); } if (s_res) { @@ -307,9 +304,6 @@ iris_postdraw_update_resolve_tracking(struct iris_context *ice, zs_surf->u.tex.first_layer, num_layers, s_res->aux.usage); } - - if (ice->state.stencil_writes_enabled) - iris_depth_cache_add_bo(batch, s_res->bo); } } @@ -347,9 +341,6 @@ iris_cache_sets_clear(struct iris_batch *batch) { hash_table_foreach(batch->cache.render, render_entry) _mesa_hash_table_remove(batch->cache.render, render_entry); - - set_foreach(batch->cache.depth, depth_entry) - _mesa_set_remove(batch->cache.depth, depth_entry); } /** @@ -385,8 +376,7 @@ void iris_cache_flush_for_read(struct iris_batch *batch, struct iris_bo *bo) { - if (_mesa_hash_table_search_pre_hashed(batch->cache.render, bo->hash, bo) || - _mesa_set_search_pre_hashed(batch->cache.depth, bo->hash, bo)) + if (_mesa_hash_table_search_pre_hashed(batch->cache.render, bo->hash, bo)) iris_flush_depth_and_render_caches(batch); iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_OTHER_READ); @@ -406,9 +396,6 @@ iris_cache_flush_for_render(struct iris_batch *batch, { iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_RENDER_WRITE); - if (_mesa_set_search_pre_hashed(batch->cache.depth, bo->hash, bo)) - iris_flush_depth_and_render_caches(batch); - /* Check to see if this bo has been used by a previous rendering operation * but with a different format or aux usage. If it has, flush the render * cache so we ensure that it's only in there with one format or aux usage @@ -469,12 +456,6 @@ iris_cache_flush_for_depth(struct iris_batch *batch, iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_DEPTH_WRITE); } -void -iris_depth_cache_add_bo(struct iris_batch *batch, struct iris_bo *bo) -{ - _mesa_set_add_pre_hashed(batch->cache.depth, bo->hash, bo); -} - static void iris_resolve_color(struct iris_context *ice, struct iris_batch *batch, -- 2.30.2