From aafc95ceb6e9ebd62d456b95383ce7f05be0afd9 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 2 Jan 2019 15:50:13 -0500 Subject: [PATCH] radeonsi: add support for Renoir Reviewed-by: Bas Nieuwenhuizen --- include/pci_ids/radeonsi_pci_ids.h | 2 ++ src/amd/addrlib/src/amdgpu_asic_addr.h | 2 ++ src/amd/addrlib/src/gfx9/gfx9addrlib.cpp | 5 +++++ src/amd/common/ac_gpu_info.c | 3 ++- src/amd/common/ac_llvm_util.c | 1 + src/amd/common/amd_family.h | 1 + src/gallium/drivers/radeonsi/si_pipe.c | 4 +++- src/gallium/drivers/radeonsi/si_state.c | 1 + 8 files changed, 17 insertions(+), 2 deletions(-) diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h index 9306fcce57d..fc545a1af0c 100644 --- a/include/pci_ids/radeonsi_pci_ids.h +++ b/include/pci_ids/radeonsi_pci_ids.h @@ -254,6 +254,8 @@ CHIPSET(0x66AF, VEGA20) CHIPSET(0x15DD, RAVEN) CHIPSET(0x15D8, RAVEN) +CHIPSET(0x1636, RENOIR) + CHIPSET(0x738C, ARCTURUS) CHIPSET(0x7388, ARCTURUS) CHIPSET(0x738E, ARCTURUS) diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h b/src/amd/addrlib/src/amdgpu_asic_addr.h index 75c06796ad7..0358ab127b2 100644 --- a/src/amd/addrlib/src/amdgpu_asic_addr.h +++ b/src/amd/addrlib/src/amdgpu_asic_addr.h @@ -93,6 +93,7 @@ #define AMDGPU_RAVEN_RANGE 0x01, 0x81 #define AMDGPU_RAVEN2_RANGE 0x81, 0xFF +#define AMDGPU_RENOIR_RANGE 0x01, 0x91 #define AMDGPU_ARCTURUS_RANGE 0x32, 0xFF @@ -141,6 +142,7 @@ #define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN) #define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2) +#define ASICREV_IS_RENOIR(r) ASICREV_IS(r, RENOIR) #define ASICREV_IS_ARCTURUS(r) ASICREV_IS(r, ARCTURUS) diff --git a/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp b/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp index 611c18fc1f0..cb0d3f054d7 100644 --- a/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp +++ b/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp @@ -1312,6 +1312,11 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily( m_settings.applyAliasFix = 1; } + if (ASICREV_IS_RENOIR(uChipRevision)) + { + m_settings.isRaven = 1; + } + m_settings.isDcn1 = m_settings.isRaven; m_settings.metaBaseAlignFix = 1; diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index b02a3e98113..9ec7359ed79 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -478,7 +478,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, if (info->drm_minor >= 31 && (info->family == CHIP_RAVEN || - info->family == CHIP_RAVEN2)) { + info->family == CHIP_RAVEN2 || + info->family == CHIP_RENOIR)) { if (info->num_render_backends == 1) info->use_display_dcc_unaligned = true; else diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c index b43224b3b73..a201f2d1fc5 100644 --- a/src/amd/common/ac_llvm_util.c +++ b/src/amd/common/ac_llvm_util.c @@ -132,6 +132,7 @@ const char *ac_get_llvm_processor_name(enum radeon_family family) case CHIP_VEGA20: return "gfx906"; case CHIP_RAVEN2: + case CHIP_RENOIR: return HAVE_LLVM >= 0x0800 ? "gfx909" : "gfx902"; case CHIP_ARCTURUS: return "gfx908"; diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h index 1d6578c0ef7..2386eecb5d4 100644 --- a/src/amd/common/amd_family.h +++ b/src/amd/common/amd_family.h @@ -97,6 +97,7 @@ enum radeon_family { CHIP_VEGA20, CHIP_RAVEN, CHIP_RAVEN2, + CHIP_RENOIR, CHIP_ARCTURUS, CHIP_NAVI10, CHIP_NAVI12, diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index f19c2a22ebd..139f4954dfa 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1150,6 +1150,7 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 || sscreen->info.family == CHIP_RAVEN; sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2 || + sscreen->info.family == CHIP_RENOIR || sscreen->info.chip_class >= GFX10; sscreen->use_ngg = sscreen->info.chip_class >= GFX10; sscreen->use_ngg_streamout = sscreen->info.chip_class >= GFX10; @@ -1195,7 +1196,8 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, (sscreen->info.family == CHIP_STONEY || sscreen->info.family == CHIP_VEGA12 || sscreen->info.family == CHIP_RAVEN || - sscreen->info.family == CHIP_RAVEN2); + sscreen->info.family == CHIP_RAVEN2 || + sscreen->info.family == CHIP_RENOIR); } sscreen->dcc_msaa_allowed = diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 5cdad024694..19e568259c2 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -5685,6 +5685,7 @@ static void si_init_config(struct si_context *sctx) break; case CHIP_RAVEN: case CHIP_RAVEN2: + case CHIP_RENOIR: case CHIP_NAVI10: case CHIP_NAVI12: pc_lines = 1024; -- 2.30.2