From ab40d12129532bb5da02f2e8b9d10107069f00a0 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 30 Apr 2019 00:24:22 +0100 Subject: [PATCH] update comments on FIFOControl --- src/add/queue.py | 17 ++++++++++------- src/add/singlepipe.py | 22 ++++++++++++++-------- 2 files changed, 24 insertions(+), 15 deletions(-) diff --git a/src/add/queue.py b/src/add/queue.py index 3411a739..d0732889 100644 --- a/src/add/queue.py +++ b/src/add/queue.py @@ -35,13 +35,16 @@ class Queue(FIFOInterface, Elaboratable): def __init__(self, width, depth, fwft=True, pipe=False): """ Queue (FIFO) with pipe mode and first-write fall-through capability - * width: width of Queue data in/out - * depth: queue depth. NOTE: may be set to 0 (this is ok) - * fwft : first-write, fall-through mode (Chisel Queue "flow" mode) - * pipe : pipe mode. NOTE: this mode can cause unanticipated - problems. when read is enabled, so is writeable. - therefore if read is enabled, the data ABSOLUTELY MUST - be read. + * :width: width of Queue data in/out + * :depth: queue depth. NOTE: may be set to 0 (this is ok) + * :fwft : first-write, fall-through mode (Chisel Queue "flow" mode) + * :pipe : pipe mode. NOTE: this mode can cause unanticipated + problems. when read is enabled, so is writeable. + therefore if read is enabled, the data ABSOLUTELY MUST + be read. + + fwft mode = True basically means that the data may be transferred + combinatorially from input to output. Attributes: * level: available free space (number of unread entries) diff --git a/src/add/singlepipe.py b/src/add/singlepipe.py index 6ae11f23..f9acfb5a 100644 --- a/src/add/singlepipe.py +++ b/src/add/singlepipe.py @@ -735,14 +735,20 @@ class FIFOControl(ControlBase): fwft=True, pipe=False): """ FIFO Control - * :depth: number of entries in the FIFO - * :stage: data processing block - * :fwft: first word fall-thru mode (non-fwft introduces delay) - * :buffered: use buffered FIFO (introduces extra cycle delay) - - NOTE 1: FPGAs may have trouble with the defaults for SyncFIFO - (fwft=True, buffered=False). XXX TODO: fix this by - using Queue in all cases instead. + * :depth: number of entries in the FIFO + * :stage: data processing block + * :fwft: first word fall-thru mode (non-fwft introduces delay) + * :pipe: specifies pipe mode. + + when fwft = True it indicates that transfers may occur + combinatorially through stage processing in the same clock cycle. + This requires that the Stage be a Moore FSM: + https://en.wikipedia.org/wiki/Moore_machine + + when fwft = False it indicates that all output signals are + produced only from internal registers or memory, i.e. that the + Stage is a Mealy FSM: + https://en.wikipedia.org/wiki/Mealy_machine data is processed (and located) as follows: -- 2.30.2