From ab6133e2eafda063e79252745c05118283b84af9 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 8 Nov 2021 21:31:06 +0000 Subject: [PATCH] add auto-generated ngi_router.mdwn from pinmux.py --- crypto_router_asic/ngi_router.mdwn | 797 +++++++++++++++++++++++++++++ 1 file changed, 797 insertions(+) create mode 100644 crypto_router_asic/ngi_router.mdwn diff --git a/crypto_router_asic/ngi_router.mdwn b/crypto_router_asic/ngi_router.mdwn new file mode 100644 index 000000000..8fcaac639 --- /dev/null +++ b/crypto_router_asic/ngi_router.mdwn @@ -0,0 +1,797 @@ +# Pinouts (PinMux) +auto-generated by [[pinouts.py]] + +[[!toc ]] + + +## Bank N (64 pins, width 2) + +| Pin | Mux0 | Mux1 | Mux2 | Mux3 | +| --- | ----------- | ----------- | ----------- | ----------- | +| 0 | N VSSE_0 | | +| 1 | N VDDE_0 | | +| 2 | N VDDI_0 | | +| 3 | N VSSI_0 | | +| 4 | N SDR_DQM0 | | +| 5 | N SDR_D0 | | +| 6 | N SDR_D1 | | +| 7 | N SDR_D2 | | +| 8 | N SDR_D3 | | +| 9 | N SDR_D4 | | +| 10 | N SDR_D5 | | +| 11 | N SDR_D6 | | +| 12 | N SDR_D7 | | +| 13 | N SDR_BA0 | | +| 14 | N SDR_BA1 | | +| 15 | N SDR_AD0 | | +| 16 | N SDR_AD1 | | +| 17 | N SDR_AD2 | | +| 18 | N SDR_AD3 | | +| 19 | N SDR_AD4 | | +| 20 | N SDR_AD5 | | +| 21 | N SDR_AD6 | | +| 22 | N SDR_AD7 | | +| 23 | N SDR_AD8 | | +| 24 | N SDR_AD9 | | +| 25 | N SDR_CLK | | +| 26 | N SDR_CKE | | +| 27 | N SDR_RASn | | +| 28 | N SDR_CASn | | +| 29 | N SDR_WEn | | +| 30 | N SDR_CSn0 | | +| 54 | N VSSI_0 | | +| 55 | N VDDI_0 | | +| 56 | N VSSE_0 | | +| 57 | N VDDE_0 | | +| 59 | N SYS_RST | | +| 60 | N SYS_PLLCLK | | +| 61 | N SYS_PLLSELA0 | | +| 62 | N SYS_PLLSELA1 | | +| 63 | N SYS_PLLTESTOUT | | + +## Bank E (64 pins, width 2) + +| Pin | Mux0 | Mux1 | Mux2 | Mux3 | +| --- | ----------- | ----------- | ----------- | ----------- | +| 64 | E VSSE_0 | | +| 65 | E VDDE_0 | | +| 66 | E RG2_ERXD0 | | +| 67 | E RG2_ERXD1 | | +| 68 | E RG2_ERXD2 | | +| 69 | E RG2_ERXD3 | | +| 70 | E RG2_ETXD0 | | +| 71 | E RG2_ETXD1 | | +| 72 | E RG2_ETXD2 | | +| 73 | E RG2_ETXD3 | | +| 74 | E RG2_ERXCK | | +| 75 | E RG2_ERXERR | | +| 76 | E RG2_ERXDV | | +| 77 | E RG2_EMDC | | +| 78 | E RG2_EMDIO | | +| 79 | E RG2_ETXEN | | +| 80 | E RG2_ETXCK | | +| 81 | E RG2_ECRS | | +| 82 | E RG2_ECOL | | +| 83 | E RG2_ETXERR | | +| 84 | E VSSE_4 | | +| 85 | E VDDE_4 | | +| 86 | E RG1_ERXD0 | | +| 87 | E RG1_ERXD1 | | +| 88 | E RG1_ERXD2 | | +| 89 | E RG1_ERXD3 | | +| 90 | E RG1_ETXD0 | | +| 91 | E RG1_ETXD1 | | +| 92 | E RG1_ETXD2 | | +| 93 | E RG1_ETXD3 | | +| 94 | E RG1_ERXCK | | +| 95 | E RG1_ERXERR | | +| 96 | E RG1_ERXDV | | +| 97 | E RG1_EMDC | | +| 98 | E RG1_EMDIO | | +| 99 | E RG1_ETXEN | | +| 100 | E RG1_ETXCK | | +| 101 | E RG1_ECRS | | +| 102 | E RG1_ECOL | | +| 103 | E RG1_ETXERR | | +| 104 | E VSSE_4 | | +| 105 | E VDDE_4 | | +| 106 | E RG0_ERXD0 | | +| 107 | E RG0_ERXD1 | | +| 108 | E RG0_ERXD2 | | +| 109 | E RG0_ERXD3 | | +| 110 | E RG0_ETXD0 | | +| 111 | E RG0_ETXD1 | | +| 112 | E RG0_ETXD2 | | +| 113 | E RG0_ETXD3 | | +| 114 | E RG0_ERXCK | | +| 115 | E RG0_ERXERR | | +| 116 | E RG0_ERXDV | | +| 117 | E RG0_EMDC | | +| 118 | E RG0_EMDIO | | +| 119 | E RG0_ETXEN | | +| 120 | E RG0_ETXCK | | +| 121 | E RG0_ECRS | | +| 122 | E RG0_ECOL | | +| 123 | E RG0_ETXERR | | +| 124 | E VSSI_4 | | +| 125 | E VDDI_4 | | +| 127 | E SYS_PLLVCOUT | | + +## Bank S (64 pins, width 2) + +| Pin | Mux0 | Mux1 | Mux2 | Mux3 | +| --- | ----------- | ----------- | ----------- | ----------- | +| 132 | S VDDE_2 | | +| 133 | S VSSE_2 | | +| 134 | S VDDI_2 | | +| 135 | S VSSI_2 | | +| 152 | S RG4_ERXD0 | | +| 153 | S RG4_ERXD1 | | +| 154 | S RG4_ERXD2 | | +| 155 | S RG4_ERXD3 | | +| 156 | S RG4_ETXD0 | | +| 157 | S RG4_ETXD1 | | +| 158 | S RG4_ETXD2 | | +| 159 | S RG4_ETXD3 | | +| 160 | S RG4_ERXCK | | +| 161 | S RG4_ERXERR | | +| 162 | S RG4_ERXDV | | +| 163 | S RG4_EMDC | | +| 164 | S RG4_EMDIO | | +| 165 | S RG4_ETXEN | | +| 166 | S RG4_ETXCK | | +| 167 | S RG4_ECRS | | +| 168 | S RG4_ECOL | | +| 169 | S RG4_ETXERR | | +| 172 | S RG3_ERXD0 | | +| 173 | S RG3_ERXD1 | | +| 174 | S RG3_ERXD2 | | +| 175 | S RG3_ERXD3 | | +| 176 | S RG3_ETXD0 | | +| 177 | S RG3_ETXD1 | | +| 178 | S RG3_ETXD2 | | +| 179 | S RG3_ETXD3 | | +| 180 | S RG3_ERXCK | | +| 181 | S RG3_ERXERR | | +| 182 | S RG3_ERXDV | | +| 183 | S RG3_EMDC | | +| 184 | S RG3_EMDIO | | +| 185 | S RG3_ETXEN | | +| 186 | S RG3_ETXCK | | +| 187 | S RG3_ECRS | | +| 188 | S RG3_ECOL | | +| 189 | S RG3_ETXERR | | + +## Bank W (64 pins, width 2) + +| Pin | Mux0 | Mux1 | Mux2 | Mux3 | +| --- | ----------- | ----------- | ----------- | ----------- | +| 192 | W VDDI_0 | | +| 193 | W VSSI_0 | | +| 194 | W VDDE_0 | | +| 195 | W VSSE_0 | | +| 196 | W ULPI0_CK | | +| 197 | W ULPI0_DIR | | +| 198 | W ULPI0_STP | | +| 199 | W ULPI0_NXT | | +| 200 | W ULPI0_D0 | | +| 201 | W ULPI0_D1 | | +| 202 | W ULPI0_D2 | | +| 203 | W ULPI0_D3 | | +| 204 | W ULPI0_D4 | | +| 205 | W ULPI0_D5 | | +| 206 | W ULPI0_D6 | | +| 207 | W ULPI0_D7 | | +| 208 | W VDDI_1 | | +| 209 | W VSSI_1 | | +| 210 | W ULPI1_CK | | +| 211 | W ULPI1_DIR | | +| 212 | W ULPI1_STP | | +| 213 | W ULPI1_NXT | | +| 214 | W ULPI1_D0 | | +| 215 | W ULPI1_D1 | | +| 216 | W ULPI1_D2 | | +| 217 | W ULPI1_D3 | | +| 218 | W ULPI1_D4 | | +| 219 | W ULPI1_D5 | | +| 220 | W ULPI1_D6 | | +| 221 | W ULPI1_D7 | | +| 222 | W VDDE_1 | | +| 223 | W VSSE_1 | | +| 224 | W UART0_TX | | +| 225 | W UART0_RX | | +| 226 | W VDDI_2 | | +| 227 | W VSSI_2 | | +| 228 | W EINT_0 | | +| 229 | W EINT_1 | | +| 230 | W EINT_2 | | +| 234 | W VDDE_2 | | +| 235 | W VSSE_2 | | +| 236 | W GPIOW_W0 | | +| 237 | W GPIOW_W1 | | +| 238 | W GPIOW_W2 | | +| 239 | W GPIOW_W3 | | +| 240 | W GPIOW_W4 | | +| 241 | W GPIOW_W5 | | +| 242 | W GPIOW_W6 | | +| 243 | W GPIOW_W7 | | +| 244 | W GPIOW_W8 | | +| 245 | W GPIOW_W9 | | +| 246 | W GPIOW_W10 | | +| 247 | W GPIOW_W11 | | +| 248 | W GPIOW_W12 | | +| 249 | W GPIOW_W13 | | +| 250 | W GPIOW_W14 | | +| 251 | W GPIOW_W15 | | +| 252 | W VDDI_3 | | +| 253 | W VSSI_3 | | +| 254 | W VDDE_3 | | +| 255 | W VSSE_3 | | + +# Pinouts (Fixed function) + +# Functions (PinMux) + +auto-generated by [[pinouts.py]] + +## EINT + +External Interrupt + +* EINT_0 : W36/0 +* EINT_1 : W37/0 +* EINT_2 : W38/0 + +## GPIO + +GPIO + +* GPIOW_W0 : W44/0 +* GPIOW_W1 : W45/0 +* GPIOW_W10 : W54/0 +* GPIOW_W11 : W55/0 +* GPIOW_W12 : W56/0 +* GPIOW_W13 : W57/0 +* GPIOW_W14 : W58/0 +* GPIOW_W15 : W59/0 +* GPIOW_W2 : W46/0 +* GPIOW_W3 : W47/0 +* GPIOW_W4 : W48/0 +* GPIOW_W5 : W49/0 +* GPIOW_W6 : W50/0 +* GPIOW_W7 : W51/0 +* GPIOW_W8 : W52/0 +* GPIOW_W9 : W53/0 + +## RG0 + +Gigabit Ethernet 0 + +* RG0_ECOL : E58/0 +* RG0_ECRS : E57/0 +* RG0_EMDC : E53/0 +* RG0_EMDIO : E54/0 +* RG0_ERXCK : E50/0 +* RG0_ERXD0 : E42/0 +* RG0_ERXD1 : E43/0 +* RG0_ERXD2 : E44/0 +* RG0_ERXD3 : E45/0 +* RG0_ERXDV : E52/0 +* RG0_ERXERR : E51/0 +* RG0_ETXCK : E56/0 +* RG0_ETXD0 : E46/0 +* RG0_ETXD1 : E47/0 +* RG0_ETXD2 : E48/0 +* RG0_ETXD3 : E49/0 +* RG0_ETXEN : E55/0 +* RG0_ETXERR : E59/0 + +## RG1 + +Gigabit Ethernet 1 + +* RG1_ECOL : E38/0 +* RG1_ECRS : E37/0 +* RG1_EMDC : E33/0 +* RG1_EMDIO : E34/0 +* RG1_ERXCK : E30/0 +* RG1_ERXD0 : E22/0 +* RG1_ERXD1 : E23/0 +* RG1_ERXD2 : E24/0 +* RG1_ERXD3 : E25/0 +* RG1_ERXDV : E32/0 +* RG1_ERXERR : E31/0 +* RG1_ETXCK : E36/0 +* RG1_ETXD0 : E26/0 +* RG1_ETXD1 : E27/0 +* RG1_ETXD2 : E28/0 +* RG1_ETXD3 : E29/0 +* RG1_ETXEN : E35/0 +* RG1_ETXERR : E39/0 + +## RG2 + +Gigabit Ethernet 2 + +* RG2_ECOL : E18/0 +* RG2_ECRS : E17/0 +* RG2_EMDC : E13/0 +* RG2_EMDIO : E14/0 +* RG2_ERXCK : E10/0 +* RG2_ERXD0 : E2/0 +* RG2_ERXD1 : E3/0 +* RG2_ERXD2 : E4/0 +* RG2_ERXD3 : E5/0 +* RG2_ERXDV : E12/0 +* RG2_ERXERR : E11/0 +* RG2_ETXCK : E16/0 +* RG2_ETXD0 : E6/0 +* RG2_ETXD1 : E7/0 +* RG2_ETXD2 : E8/0 +* RG2_ETXD3 : E9/0 +* RG2_ETXEN : E15/0 +* RG2_ETXERR : E19/0 + +## RG3 + +Gigabit Ethernet 3 + +* RG3_ECOL : S60/0 +* RG3_ECRS : S59/0 +* RG3_EMDC : S55/0 +* RG3_EMDIO : S56/0 +* RG3_ERXCK : S52/0 +* RG3_ERXD0 : S44/0 +* RG3_ERXD1 : S45/0 +* RG3_ERXD2 : S46/0 +* RG3_ERXD3 : S47/0 +* RG3_ERXDV : S54/0 +* RG3_ERXERR : S53/0 +* RG3_ETXCK : S58/0 +* RG3_ETXD0 : S48/0 +* RG3_ETXD1 : S49/0 +* RG3_ETXD2 : S50/0 +* RG3_ETXD3 : S51/0 +* RG3_ETXEN : S57/0 +* RG3_ETXERR : S61/0 + +## RG4 + +Gigabit Ethernet 4 + +* RG4_ECOL : S40/0 +* RG4_ECRS : S39/0 +* RG4_EMDC : S35/0 +* RG4_EMDIO : S36/0 +* RG4_ERXCK : S32/0 +* RG4_ERXD0 : S24/0 +* RG4_ERXD1 : S25/0 +* RG4_ERXD2 : S26/0 +* RG4_ERXD3 : S27/0 +* RG4_ERXDV : S34/0 +* RG4_ERXERR : S33/0 +* RG4_ETXCK : S38/0 +* RG4_ETXD0 : S28/0 +* RG4_ETXD1 : S29/0 +* RG4_ETXD2 : S30/0 +* RG4_ETXD3 : S31/0 +* RG4_ETXEN : S37/0 +* RG4_ETXERR : S41/0 + +## SDR + +SDRAM + +* SDR_AD0 : N15/0 +* SDR_AD1 : N16/0 +* SDR_AD2 : N17/0 +* SDR_AD3 : N18/0 +* SDR_AD4 : N19/0 +* SDR_AD5 : N20/0 +* SDR_AD6 : N21/0 +* SDR_AD7 : N22/0 +* SDR_AD8 : N23/0 +* SDR_AD9 : N24/0 +* SDR_BA0 : N13/0 +* SDR_BA1 : N14/0 +* SDR_CASn : N28/0 +* SDR_CKE : N26/0 +* SDR_CLK : N25/0 +* SDR_CSn0 : N30/0 +* SDR_D0 : N5/0 +* SDR_D1 : N6/0 +* SDR_D2 : N7/0 +* SDR_D3 : N8/0 +* SDR_D4 : N9/0 +* SDR_D5 : N10/0 +* SDR_D6 : N11/0 +* SDR_D7 : N12/0 +* SDR_DQM0 : N4/0 +* SDR_RASn : N27/0 +* SDR_WEn : N29/0 + +## SYS + +System Control + +* SYS_PLLCLK : N60/0 +* SYS_PLLSELA0 : N61/0 +* SYS_PLLSELA1 : N62/0 +* SYS_PLLTESTOUT : N63/0 +* SYS_PLLVCOUT : E63/0 +* SYS_RST : N59/0 + +## UART0 + +UART (TX/RX) + +* UART0_RX : W33/0 +* UART0_TX : W32/0 + +## ULPI0 + +USB ULPI0 PHY + +* ULPI0_CK : W4/0 +* ULPI0_D0 : W8/0 +* ULPI0_D1 : W9/0 +* ULPI0_D2 : W10/0 +* ULPI0_D3 : W11/0 +* ULPI0_D4 : W12/0 +* ULPI0_D5 : W13/0 +* ULPI0_D6 : W14/0 +* ULPI0_D7 : W15/0 +* ULPI0_DIR : W5/0 +* ULPI0_NXT : W7/0 +* ULPI0_STP : W6/0 + +## ULPI1 + +USB ULPI1 PHY + +* ULPI1_CK : W18/0 +* ULPI1_D0 : W22/0 +* ULPI1_D1 : W23/0 +* ULPI1_D2 : W24/0 +* ULPI1_D3 : W25/0 +* ULPI1_D4 : W26/0 +* ULPI1_D5 : W27/0 +* ULPI1_D6 : W28/0 +* ULPI1_D7 : W29/0 +* ULPI1_DIR : W19/0 +* ULPI1_NXT : W21/0 +* ULPI1_STP : W20/0 + +## VDD + +Power + +* VDDE_0 : W2/0 E1/0 N1/0 N57/0 +* VDDE_1 : W30/0 +* VDDE_2 : W42/0 S4/0 +* VDDE_3 : W62/0 +* VDDE_4 : E21/0 E41/0 +* VDDI_0 : W0/0 N2/0 N55/0 +* VDDI_1 : W16/0 +* VDDI_2 : W34/0 S6/0 +* VDDI_3 : W60/0 +* VDDI_4 : E61/0 + +## VSS + +GND + +* VSSE_0 : W3/0 E0/0 N0/0 N56/0 +* VSSE_1 : W31/0 +* VSSE_2 : W43/0 S5/0 +* VSSE_3 : W63/0 +* VSSE_4 : E20/0 E40/0 +* VSSI_0 : W1/0 N3/0 N54/0 +* VSSI_1 : W17/0 +* VSSI_2 : W35/0 S7/0 +* VSSI_3 : W61/0 +* VSSI_4 : E60/0 + +# Pinmap for NGI ROUTER Libre-SOC 180nm + +## RG0 + +* RG0_ERXD0 106 E42/0 +* RG0_ERXD1 107 E43/0 +* RG0_ERXD2 108 E44/0 +* RG0_ERXD3 109 E45/0 +* RG0_ETXD0 110 E46/0 +* RG0_ETXD1 111 E47/0 +* RG0_ETXD2 112 E48/0 +* RG0_ETXD3 113 E49/0 +* RG0_ERXCK 114 E50/0 +* RG0_ERXERR 115 E51/0 +* RG0_ERXDV 116 E52/0 +* RG0_EMDC 117 E53/0 +* RG0_EMDIO 118 E54/0 +* RG0_ETXEN 119 E55/0 +* RG0_ETXCK 120 E56/0 +* RG0_ECRS 121 E57/0 +* RG0_ECOL 122 E58/0 +* RG0_ETXERR 123 E59/0 + +## RG1 + +* RG1_ERXD0 86 E22/0 +* RG1_ERXD1 87 E23/0 +* RG1_ERXD2 88 E24/0 +* RG1_ERXD3 89 E25/0 +* RG1_ETXD0 90 E26/0 +* RG1_ETXD1 91 E27/0 +* RG1_ETXD2 92 E28/0 +* RG1_ETXD3 93 E29/0 +* RG1_ERXCK 94 E30/0 +* RG1_ERXERR 95 E31/0 +* RG1_ERXDV 96 E32/0 +* RG1_EMDC 97 E33/0 +* RG1_EMDIO 98 E34/0 +* RG1_ETXEN 99 E35/0 +* RG1_ETXCK 100 E36/0 +* RG1_ECRS 101 E37/0 +* RG1_ECOL 102 E38/0 +* RG1_ETXERR 103 E39/0 + +## RG2 + +* RG2_ERXD0 66 E2/0 +* RG2_ERXD1 67 E3/0 +* RG2_ERXD2 68 E4/0 +* RG2_ERXD3 69 E5/0 +* RG2_ETXD0 70 E6/0 +* RG2_ETXD1 71 E7/0 +* RG2_ETXD2 72 E8/0 +* RG2_ETXD3 73 E9/0 +* RG2_ERXCK 74 E10/0 +* RG2_ERXERR 75 E11/0 +* RG2_ERXDV 76 E12/0 +* RG2_EMDC 77 E13/0 +* RG2_EMDIO 78 E14/0 +* RG2_ETXEN 79 E15/0 +* RG2_ETXCK 80 E16/0 +* RG2_ECRS 81 E17/0 +* RG2_ECOL 82 E18/0 +* RG2_ETXERR 83 E19/0 + +## RG3 + +* RG3_ERXD0 172 S44/0 +* RG3_ERXD1 173 S45/0 +* RG3_ERXD2 174 S46/0 +* RG3_ERXD3 175 S47/0 +* RG3_ETXD0 176 S48/0 +* RG3_ETXD1 177 S49/0 +* RG3_ETXD2 178 S50/0 +* RG3_ETXD3 179 S51/0 +* RG3_ERXCK 180 S52/0 +* RG3_ERXERR 181 S53/0 +* RG3_ERXDV 182 S54/0 +* RG3_EMDC 183 S55/0 +* RG3_EMDIO 184 S56/0 +* RG3_ETXEN 185 S57/0 +* RG3_ETXCK 186 S58/0 +* RG3_ECRS 187 S59/0 +* RG3_ECOL 188 S60/0 +* RG3_ETXERR 189 S61/0 + +## RG4 + +* RG4_ERXD0 152 S24/0 +* RG4_ERXD1 153 S25/0 +* RG4_ERXD2 154 S26/0 +* RG4_ERXD3 155 S27/0 +* RG4_ETXD0 156 S28/0 +* RG4_ETXD1 157 S29/0 +* RG4_ETXD2 158 S30/0 +* RG4_ETXD3 159 S31/0 +* RG4_ERXCK 160 S32/0 +* RG4_ERXERR 161 S33/0 +* RG4_ERXDV 162 S34/0 +* RG4_EMDC 163 S35/0 +* RG4_EMDIO 164 S36/0 +* RG4_ETXEN 165 S37/0 +* RG4_ETXCK 166 S38/0 +* RG4_ECRS 167 S39/0 +* RG4_ECOL 168 S40/0 +* RG4_ETXERR 169 S41/0 + +## ULPI0 + +* ULPI0_CK 196 W4/0 +* ULPI0_DIR 197 W5/0 +* ULPI0_STP 198 W6/0 +* ULPI0_NXT 199 W7/0 +* ULPI0_D0 200 W8/0 +* ULPI0_D1 201 W9/0 +* ULPI0_D2 202 W10/0 +* ULPI0_D3 203 W11/0 +* ULPI0_D4 204 W12/0 +* ULPI0_D5 205 W13/0 +* ULPI0_D6 206 W14/0 +* ULPI0_D7 207 W15/0 + +## ULPI0 + + +## SDR + + + +* SDR_DQM0 4 N4/0 +* SDR_D0 5 N5/0 +* SDR_D1 6 N6/0 +* SDR_D2 7 N7/0 +* SDR_D3 8 N8/0 +* SDR_D4 9 N9/0 +* SDR_D5 10 N10/0 +* SDR_D6 11 N11/0 +* SDR_D7 12 N12/0 +* SDR_BA0 13 N13/0 +* SDR_BA1 14 N14/0 +* SDR_AD0 15 N15/0 +* SDR_AD1 16 N16/0 +* SDR_AD2 17 N17/0 +* SDR_AD3 18 N18/0 +* SDR_AD4 19 N19/0 +* SDR_AD5 20 N20/0 +* SDR_AD6 21 N21/0 +* SDR_AD7 22 N22/0 +* SDR_AD8 23 N23/0 +* SDR_AD9 24 N24/0 +* SDR_CLK 25 N25/0 +* SDR_CKE 26 N26/0 +* SDR_RASn 27 N27/0 +* SDR_CASn 28 N28/0 +* SDR_WEn 29 N29/0 +* SDR_CSn0 30 N30/0 + +## UART0 + + + +* UART0_TX 224 W32/0 +* UART0_RX 225 W33/0 + +## JTAG + + +## VDD + +* VDDE_0 1 N1/0 +* VDDI_0 2 N2/0 +* VDDE_4 85 E21/0 +* VDDI_4 125 E61/0 +* VDDE_2 132 S4/0 + +## VSS + +* VSSE_0 0 N0/0 +* VSSI_0 3 N3/0 +* VSSE_4 84 E20/0 +* VSSI_4 124 E60/0 +* VSSE_2 133 S5/0 + +## SYS + + + +* SYS_RST 59 N59/0 +* SYS_PLLCLK 60 N60/0 +* SYS_PLLSELA0 61 N61/0 +* SYS_PLLSELA1 62 N62/0 +* SYS_PLLTESTOUT 63 N63/0 +* SYS_PLLVCOUT 127 E63/0 + +## MSPI0 + + +## MTWI + +I2C. + + + +## GPIO + +* GPIOW_W0 236 W44/0 +* GPIOW_W1 237 W45/0 +* GPIOW_W2 238 W46/0 +* GPIOW_W3 239 W47/0 +* GPIOW_W4 240 W48/0 +* GPIOW_W5 241 W49/0 +* GPIOW_W6 242 W50/0 +* GPIOW_W7 243 W51/0 +* GPIOW_W8 244 W52/0 +* GPIOW_W9 245 W53/0 +* GPIOW_W10 246 W54/0 +* GPIOW_W11 247 W55/0 +* GPIOW_W12 248 W56/0 +* GPIOW_W13 249 W57/0 +* GPIOW_W14 250 W58/0 +* GPIOW_W15 251 W59/0 + +## EINT + +* EINT_0 228 W36/0 +* EINT_1 229 W37/0 +* EINT_2 230 W38/0 + +## QSPI + + +## SD0 + +user-facing: internal (on Card), multiplexed with JTAG +and UART2, for debug purposes + + +## Unused Pinouts (spare as GPIO) for 'NGI ROUTER Libre-SOC 180nm' + +| Pin | Mux0 | Mux1 | Mux2 | Mux3 | +| --- | ----------- | ----------- | ----------- | ----------- | +| 54 | N VSSI_0 | | | | +| 55 | N VDDI_0 | | | | +| 56 | N VSSE_0 | | | | +| 57 | N VDDE_0 | | | | +| 64 | E VSSE_0 | | | | +| 65 | E VDDE_0 | | | | +| 104 | E VSSE_4 | | | | +| 105 | E VDDE_4 | | | | +| 134 | S VDDI_2 | | | | +| 135 | S VSSI_2 | | | | +| 192 | W VDDI_0 | | | | +| 193 | W VSSI_0 | | | | +| 194 | W VDDE_0 | | | | +| 195 | W VSSE_0 | | | | +| 208 | W VDDI_1 | | | | +| 209 | W VSSI_1 | | | | +| 210 | W ULPI1_CK | | | | +| 211 | W ULPI1_DIR | | | | +| 212 | W ULPI1_STP | | | | +| 213 | W ULPI1_NXT | | | | +| 214 | W ULPI1_D0 | | | | +| 215 | W ULPI1_D1 | | | | +| 216 | W ULPI1_D2 | | | | +| 217 | W ULPI1_D3 | | | | +| 218 | W ULPI1_D4 | | | | +| 219 | W ULPI1_D5 | | | | +| 220 | W ULPI1_D6 | | | | +| 221 | W ULPI1_D7 | | | | +| 222 | W VDDE_1 | | | | +| 223 | W VSSE_1 | | | | +| 226 | W VDDI_2 | | | | +| 227 | W VSSI_2 | | | | +| 234 | W VDDE_2 | | | | +| 235 | W VSSE_2 | | | | +| 252 | W VDDI_3 | | | | +| 253 | W VSSI_3 | | | | +| 254 | W VDDE_3 | | | | +| 255 | W VSSE_3 | | | | + +# Reference Datasheets + +datasheets and pinout links +* +* +* + +* +* +* +* p8 +* +* +* +* ULPI OTG PHY, ST +* ULPI OTG PHY, TI TUSB1210 + +# Pin Bank starting points and lengths + +* E 64 64 2 +* N 0 64 2 +* S 128 64 2 +* W 192 64 2 -- 2.30.2