From ab6dceab101d62684d93655217f0ff5840c6ef5b Mon Sep 17 00:00:00 2001 From: Andrey Belevantsev Date: Mon, 9 Apr 2018 12:16:34 +0300 Subject: [PATCH] re PR rtl-optimization/83962 (ICE: verify_flow_info failed (too many outgoing branch edges from bb 8)) PR rtl-optimization/83962 * sel-sched-ir.c (tidy_control_flow): Correct the order in which we call tidy_fallthru_edge and tidy_control_flow. * gcc.dg/pr83962.c: New test. From-SVN: r259229 --- gcc/ChangeLog | 7 +++++++ gcc/sel-sched-ir.c | 8 ++++++-- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.dg/pr83962.c | 10 ++++++++++ 4 files changed, 28 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr83962.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a09b7bafed9..99d9ccacd36 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-04-09 Andrey Belevantsev + + PR rtl-optimization/83962 + + * sel-sched-ir.c (tidy_control_flow): Correct the order in which we call + tidy_fallthru_edge and tidy_control_flow. + 2018-04-09 Andrey Belevantsev PR rtl-optimization/83530 diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c index a965d2ec42f..987bd9f93cf 100644 --- a/gcc/sel-sched-ir.c +++ b/gcc/sel-sched-ir.c @@ -3839,9 +3839,13 @@ tidy_control_flow (basic_block xbb, bool full_tidying) && INSN_SCHED_TIMES (BB_END (xbb)) == 0 && !IN_CURRENT_FENCE_P (BB_END (xbb))) { - if (sel_remove_insn (BB_END (xbb), false, false)) - return true; + /* We used to call sel_remove_insn here that can trigger tidy_control_flow + before we fix up the fallthru edge. Correct that ordering by + explicitly doing the latter before the former. */ + clear_expr (INSN_EXPR (BB_END (xbb))); tidy_fallthru_edge (EDGE_SUCC (xbb, 0)); + if (tidy_control_flow (xbb, false)) + return true; } first = sel_bb_head (xbb); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c1653f726ac..91a1a2f8973 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-04-09 Andrey Belevantsev + + PR rtl-optimization/83962 + * gcc.dg/pr83962.c: New test. + 2018-04-09 Andrey Belevantsev PR rtl-optimization/83530 diff --git a/gcc/testsuite/gcc.dg/pr83962.c b/gcc/testsuite/gcc.dg/pr83962.c new file mode 100644 index 00000000000..0547e218715 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr83962.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */ +/* { dg-options "-std=gnu99 -O1 -fselective-scheduling2 -fschedule-insns2 -fcse-follow-jumps -fno-ssa-phiopt -fno-guess-branch-probability" } */ +unsigned int ca; + +void +v6 (long long unsigned int as, int p9) +{ + while (p9 < 1) + as = (as != ca) || (as > 1); +} -- 2.30.2