From ac33c7b57b8c667b49e7c2c6642a0b1e9f0d4025 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 19 Dec 2020 16:44:34 +0000 Subject: [PATCH] note about naming --- openpower/sv/svp_rewrite/svp64.mdwn | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn index b3048cce6..60f834077 100644 --- a/openpower/sv/svp_rewrite/svp64.mdwn +++ b/openpower/sv/svp_rewrite/svp64.mdwn @@ -402,6 +402,12 @@ of the OpenPOWER v3.0B / v3.1B register naming, and in hardware this would be reflected by a linear increase in the size of the underlying SRAM used for the regfiles. +Note: when the EXTRA fields are all zero, SV is deliberately designed +so that the register fields are identical to as if SV was not in effect +i.e. under these circumstances (EXTRA=0) the register field names RA, +RB etc. are interpreted as v3.0B / v3.1B scalar registers. This is termed +`scalar identity behaviour` + # Operation ## CR fields as inputs/outputs of vector operations -- 2.30.2