From ac76b92427aa8aefedba3df657696332c851883e Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 6 Aug 2021 16:36:34 +0100 Subject: [PATCH] --- openpower/sv/branches.mdwn | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn index 1fcafc83f..a467de30d 100644 --- a/openpower/sv/branches.mdwn +++ b/openpower/sv/branches.mdwn @@ -99,9 +99,9 @@ SVP64 RM `MODE` (includes `ELWIDTH` and `ELWIDTH_SRC` bits) for Branch Condition | 4 | 5 | 6 | 7 | 19 | 20 | 21 | 22 23 | description | | - | - | - | - | -- | -- | --- |---------|-------------------- | |ALL|LRu| / | / | 0 | 0 | / | SNZ sz | normal mode | -|ALL|LRu| / | / | 0 | 1 | VLI | SNZ sz | VLSET mode | +|ALL|LRu| / |VSb| 0 | 1 | VLI | SNZ sz | VLSET mode | |ALL|LRu|BRc| / | 1 | 0 | / | SNZ sz | svstep mode | -|ALL|LRu|BRc| / | 1 | 1 | VLI | SNZ sz | svstep+VLSET mode | +|ALL|LRu|BRc|VSb| 1 | 1 | VLI | SNZ sz | svstep+VLSET mode | Fields: @@ -113,7 +113,8 @@ Fields: * **VLI** Identical to Data-dependent Fail-First mode. In VLSET mode, VL is set equal (truncated) to the first point where, assuming Conditions are tested sequentially, the branch succeeds - *or fails*. If VLI (Vector Length Inclusive) is clear, + *or fails* depending if VSb is set. + If VLI (Vector Length Inclusive) is clear, VL is truncated to *exclude* the current element, otherwise it is included. SVSTATE.MVL is not changed: only VL. * **LRu**: Link Register Update. When set, Link Register will @@ -121,6 +122,9 @@ Fields: destruction of LR during loops. * **BRc** Branch variant of Rc. Instructs svstep testing to overwrite the CR Field about to be tested +* **VSb** is most relevant for Vertical-First VLSET Mode. After testing, + if VSb is set, VL is truncated if the branch succeeds. If VSb is clear, + VL is truncated if the branch did **not** take place. svstep mode will run an increment of SVSTATE srcstep and dststep (which is still useful in Horizontal First Mode). Unlike `svstep.` @@ -136,8 +140,13 @@ and `svstep` mode it is actually useful to use Branch Conditional even to perform no actual branch operation, i.e to point to the instruction after the branch. -`VLSET` mode with Vertical-First is particularly unusual. TODO -investigate svstep index checks. +`VLSET` mode with Vertical-First is particularly unusual. Vertical-First +is used for explicit looping, where the looping is to terminate if +the end of the Vector, VL, is reached. If however that loop is terminated +early because VL is truncated, VLSET with Vertical-First becomes +meaningless. Therefore, the option to decide whether truncation should +occur if the branch succeeds *or* if the branch condition fails allows +for flexibility required. In particular, svstep mode is still useful for Horizontal-First Mode particularly in combination with REMAP. All "loop end" conditions -- 2.30.2