From ac7f631be1d010ef8efa59a6d862709277e834d8 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 19 Apr 2011 07:27:32 +0000 Subject: [PATCH] * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask. * gas/arm/mrs-msr-thumb-v7e-m.s: Likewise. * gas/arm/arch7.d: Update expected disassembly. * gas/arm/attr-march-armv7.d: Remove Microcontroller tag. * gas/arm/blx-bad.d: Only run for ELF based targets. * gas/arm/mrs-msr-thumb-v6t2.d: Likewise. * gas/arm/vldm-arm.d: Likewise. * gas/arm/mrs-msr-thumb-v7-m.d: Likewise. Remove qualifiers from PSR and IAPSR regsiter names. * gas/arm/mrs-msr-thumb-v7e-m.d: Likewise. * gas/arm/thumb2_bcond.d: Update expected disassembly to allow for relaxing of branch insns. * gas/arm/thumb32.d: Fix whitespace problems in disassembly. * config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to detect M-profile targets. (do_t_swi): Exclude v7 and higher variants from arm_ext_os test. (v7m_psrs): Fix typo: basepri_max should be basepri_mask. * arm-dis.c (psr_name): Revert previous delta. * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask. --- gas/ChangeLog | 8 +++++ gas/config/tc-arm.c | 9 +++-- gas/testsuite/ChangeLog | 16 +++++++++ gas/testsuite/gas/arm/arch7.d | 13 +++---- gas/testsuite/gas/arm/arch7.s | 4 +-- gas/testsuite/gas/arm/attr-march-armv7.d | 1 - gas/testsuite/gas/arm/blx-bad.d | 2 ++ gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d | 2 ++ gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d | 7 ++-- gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d | 6 ++-- gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s | 2 +- gas/testsuite/gas/arm/thumb2_bcond.d | 40 ++++++++++----------- gas/testsuite/gas/arm/thumb32.d | 5 +-- gas/testsuite/gas/arm/vldm-arm.d | 2 ++ include/opcode/ChangeLog | 4 +++ include/opcode/arm.h | 3 +- opcodes/ChangeLog | 4 +++ opcodes/arm-dis.c | 11 +----- 18 files changed, 87 insertions(+), 52 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 2c7f2f68bf7..52a3df22158 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2011-04-18 Julian Brown + Nick Clifton + + * config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to + detect M-profile targets. + (do_t_swi): Exclude v7 and higher variants from arm_ext_os test. + (v7m_psrs): Fix typo: basepri_max should be basepri_mask. + 2011-04-14 Andreas Krebbel * config/tc-s390.c (s390_machine): New prototype. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 736693ee2e3..ff4d090f926 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -5354,7 +5354,7 @@ parse_psr (char **str, bfd_boolean lhs) const struct asm_psr *psr; char *start; bfd_boolean is_apsr = FALSE; - bfd_boolean m_profile = ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_m); + bfd_boolean m_profile = ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m); /* CPSR's and SPSR's can now be lowercase. This is just a convenience feature for ease of use and backwards compatibility. */ @@ -11760,7 +11760,9 @@ do_t_swi (void) to ARM_EXT_V6M. */ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6m)) { - if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os)) + if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os) + /* This only applies to the v6m howver, not later architectures. */ + && ! ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7)) as_bad (_("SVC is not permitted on this architecture")); ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, arm_ext_os); } @@ -16632,7 +16634,8 @@ static const struct asm_psr v7m_psrs[] = {"psp", 9 }, {"PSP", 9 }, {"primask", 16}, {"PRIMASK", 16}, {"basepri", 17}, {"BASEPRI", 17}, - {"basepri_max", 18}, {"BASEPRI_MAX", 18}, + {"basepri_max", 18}, {"BASEPRI_MAX", 18}, /* Typo, preserved for backwards compatibility. */ + {"basepri_mask",18}, {"BASEPRI_MASK", 18}, {"faultmask", 19}, {"FAULTMASK", 19}, {"control", 20}, {"CONTROL", 20} }; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index c0ca65a5413..4e4f6ae162f 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,19 @@ +2011-04-18 Nick Clifton + + * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask. + * gas/arm/mrs-msr-thumb-v7e-m.s: Likewise. + * gas/arm/arch7.d: Update expected disassembly. + * gas/arm/attr-march-armv7.d: Remove Microcontroller tag. + * gas/arm/blx-bad.d: Only run for ELF based targets. + * gas/arm/mrs-msr-thumb-v6t2.d: Likewise. + * gas/arm/vldm-arm.d: Likewise. + * gas/arm/mrs-msr-thumb-v7-m.d: Likewise. + Remove qualifiers from PSR and IAPSR regsiter names. + * gas/arm/mrs-msr-thumb-v7e-m.d: Likewise. + * gas/arm/thumb2_bcond.d: Update expected disassembly to allow for + relaxing of branch insns. + * gas/arm/thumb32.d: Fix whitespace problems in disassembly. + 2011-04-18 Tristan Gingold * gas/macros/app1.s: Export symbol diff --git a/gas/testsuite/gas/arm/arch7.d b/gas/testsuite/gas/arm/arch7.d index 2da6d0af316..8641995cbec 100644 --- a/gas/testsuite/gas/arm/arch7.d +++ b/gas/testsuite/gas/arm/arch7.d @@ -57,13 +57,13 @@ Disassembly of section .text: 0+0c0 <[^>]*> f3ef 8009 mrs r0, PSP 0+0c4 <[^>]*> f3ef 8010 mrs r0, PRIMASK 0+0c8 <[^>]*> f3ef 8011 mrs r0, BASEPRI -0+0cc <[^>]*> f3ef 8012 mrs r0, BASEPRI_MAX +0+0cc <[^>]*> f3ef 8012 mrs r0, BASEPRI_MASK 0+0d0 <[^>]*> f3ef 8013 mrs r0, FAULTMASK 0+0d4 <[^>]*> f3ef 8014 mrs r0, CONTROL 0+0d8 <[^>]*> f380 8800 msr (CPSR_f|APSR_nzcvq), r0 -0+0dc <[^>]*> f380 8801 msr IAPSR_nzcvq, r0 -0+0e0 <[^>]*> f380 8802 msr EAPSR_nzcvq, r0 -0+0e4 <[^>]*> f380 8803 msr PSR_nzcvq, r0 +0+0dc <[^>]*> f380 8801 msr IAPSR, r0 +0+0e0 <[^>]*> f380 8802 msr EAPSR, r0 +0+0e4 <[^>]*> f380 8803 msr PSR, r0 0+0e8 <[^>]*> f380 8805 msr IPSR, r0 0+0ec <[^>]*> f380 8806 msr EPSR, r0 0+0f0 <[^>]*> f380 8807 msr IEPSR, r0 @@ -71,9 +71,10 @@ Disassembly of section .text: 0+0f8 <[^>]*> f380 8809 msr PSP, r0 0+0fc <[^>]*> f380 8810 msr PRIMASK, r0 0+100 <[^>]*> f380 8811 msr BASEPRI, r0 -0+104 <[^>]*> f380 8812 msr BASEPRI_MAX, r0 +0+104 <[^>]*> f380 8812 msr BASEPRI_MASK, r0 0+108 <[^>]*> f380 8813 msr FAULTMASK, r0 0+10c <[^>]*> f380 8814 msr CONTROL, r0 0+110 <[^>]*> f3ef 8003 mrs r0, PSR -0+114 <[^>]*> f380 8803 msr PSR_nzcvq, r0 +0+114 <[^>]*> f380 8803 msr PSR, r0 0+118 <[^>]*> df00 svc 0 +#... diff --git a/gas/testsuite/gas/arm/arch7.s b/gas/testsuite/gas/arm/arch7.s index 27059dc2ce6..551935b3d5d 100644 --- a/gas/testsuite/gas/arm/arch7.s +++ b/gas/testsuite/gas/arm/arch7.s @@ -60,7 +60,7 @@ label2: mrs r0, psp mrs r0, primask mrs r0, basepri - mrs r0, basepri_max + mrs r0, basepri_mask mrs r0, faultmask mrs r0, control msr apsr_nzcvq, r0 @@ -74,7 +74,7 @@ label2: msr psp, r0 msr primask, r0 msr basepri, r0 - msr basepri_max, r0 + msr BASEPRI_MASK, r0 msr faultmask, r0 msr control, r0 mrs r0, xpsr diff --git a/gas/testsuite/gas/arm/attr-march-armv7.d b/gas/testsuite/gas/arm/attr-march-armv7.d index c6bd0d4bdae..57e021e1fae 100644 --- a/gas/testsuite/gas/arm/attr-march-armv7.d +++ b/gas/testsuite/gas/arm/attr-march-armv7.d @@ -9,6 +9,5 @@ Attribute Section: aeabi File Attributes Tag_CPU_name: "7" Tag_CPU_arch: v7 - Tag_CPU_arch_profile: Microcontroller Tag_THUMB_ISA_use: Thumb-2 Tag_DIV_use: Not allowed diff --git a/gas/testsuite/gas/arm/blx-bad.d b/gas/testsuite/gas/arm/blx-bad.d index 34f70cce1e0..4a9fa85843e 100644 --- a/gas/testsuite/gas/arm/blx-bad.d +++ b/gas/testsuite/gas/arm/blx-bad.d @@ -1,5 +1,7 @@ #objdump: -drw --show-raw-insn #name: BLX encoding +# This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* .*: file format .*arm.* diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d index cc0ba1b9594..232e23731ee 100644 --- a/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d +++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v6t2.d @@ -1,5 +1,7 @@ #objdump: -dr --prefix-addresses --show-raw-insn #name: MRS/MSR test, architecture v6t2, Thumb mode +# This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* .*: file format .* diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d index 0a73897636f..594ab43cd4e 100644 --- a/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d +++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7-m.d @@ -1,6 +1,7 @@ #objdump: -dr --prefix-addresses --show-raw-insn #name: MRS/MSR test, architecture v7-M, Thumb mode - +# This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* .*: file format .* @@ -9,7 +10,7 @@ Disassembly of section .text: 0+00 <[^>]*> f3ef 8400 mrs r4, CPSR 0+04 <[^>]*> f3ef 8502 mrs r5, EAPSR 0+08 <[^>]*> f3ef 8610 mrs r6, PRIMASK -0+0c <[^>]*> f383 8803 msr PSR_nzcvq, r3 +0+0c <[^>]*> f383 8803 msr PSR, r3 0+10 <[^>]*> f384 8800 msr CPSR_f, r4 -0+14 <[^>]*> f385 8801 msr IAPSR_nzcvq, r5 +0+14 <[^>]*> f385 8801 msr IAPSR, r5 0+18 <[^>]*> f386 8810 msr PRIMASK, r6 diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d index 8eb1ff917fd..a77838614b5 100644 --- a/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d +++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.d @@ -1,5 +1,7 @@ #objdump: -dr --prefix-addresses --show-raw-insn #name: MRS/MSR test, architecture v7e-M, Thumb mode +# This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* .*: file format .* @@ -9,5 +11,5 @@ Disassembly of section .text: 0+04 <[^>]*> f3ef 8502 mrs r5, EAPSR 0+08 <[^>]*> f3ef 8610 mrs r6, PRIMASK 0+0c <[^>]*> f384 8c00 msr CPSR_fs, r4 -0+10 <[^>]*> f385 8401 msr IAPSR_g, r5 -0+14 <[^>]*> f386 8812 msr BASEPRI_MAX, r6 +0+10 <[^>]*> f385 8401 msr IAPSR, r5 +0+14 <[^>]*> f386 8812 msr BASEPRI_MASK, r6 diff --git a/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s index e9e85883784..ccc4b68b119 100644 --- a/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s +++ b/gas/testsuite/gas/arm/mrs-msr-thumb-v7e-m.s @@ -7,4 +7,4 @@ mrs r6, primask msr apsr_nzcvqg, r4 msr iapsr_g, r5 - msr basepri_max, r6 + msr basepri_mask, r6 diff --git a/gas/testsuite/gas/arm/thumb2_bcond.d b/gas/testsuite/gas/arm/thumb2_bcond.d index edf286d6e0b..be4605eea64 100644 --- a/gas/testsuite/gas/arm/thumb2_bcond.d +++ b/gas/testsuite/gas/arm/thumb2_bcond.d @@ -4,24 +4,24 @@ .*: +file format .*arm.* Disassembly of section .text: -0+000 <[^>]+> bf18 it ne -0+002 <[^>]+> f7ff bffd bne.w 0+0 <[^>]+> -0+006 <[^>]+> bf38 it cc -0+008 <[^>]+> f7ff bffa bcc.w 0+0 <[^>]+> -0+00c <[^>]+> bf28 it cs -0+00e <[^>]+> f7ff fff7 blcs 0+0 <[^>]+> -0+012 <[^>]+> bfb8 it lt -0+014 <[^>]+> 47a8 blxlt r5 -0+016 <[^>]+> bf08 it eq -0+018 <[^>]+> 4740 bxeq r8 -0+01a <[^>]+> bfc8 it gt -0+01c <[^>]+> e8d4 f001 tbbgt \[r4, r1\] -0+020 <[^>]+> bfb8 it lt -0+022 <[^>]+> df00 svclt 0 -0+024 <[^>]+> bf08 it eq -0+026 <[^>]+> f8d0 f000 ldreq.w pc, \[r0\] -0+02a <[^>]+> bfdc itt le -0+02c <[^>]+> be00 bkpt 0x0000 -0+02e <[^>]+> bf00 nople -0+030 <[^>]+> bf00 nop +0+000 <[^>]+> bf18[ ]+it ne +0+002 <[^>]+> [0-9a-f ]+[ ]+bne.[nw] 0+0 <[^>]+> +0+00. <[^>]+> bf38[ ]+it cc +0+00. <[^>]+> f7ff bff[ab][ ]+bcc.w 0+0 <[^>]+> +0+00. <[^>]+> bf28[ ]+it cs +0+0.. <[^>]+> f7ff fff[78][ ]+blcs 0+0 <[^>]+> +0+0.. <[^>]+> bfb8[ ]+it lt +0+0.. <[^>]+> 47a8[ ]+blxlt r5 +0+0.. <[^>]+> bf08[ ]+it eq +0+0.. <[^>]+> 4740[ ]+bxeq r8 +0+0.. <[^>]+> bfc8[ ]+it gt +0+0.. <[^>]+> e8d4 f001[ ]+tbbgt \[r4, r1\] +0+0.. <[^>]+> bfb8[ ]+it lt +0+0.. <[^>]+> df00[ ]+svclt 0 +0+0.. <[^>]+> bf08[ ]+it eq +0+0.. <[^>]+> f8d0 f000[ ]+ldreq.w pc, \[r0\] +0+0.. <[^>]+> bfdc[ ]+itt le +0+0.. <[^>]+> be00[ ]+bkpt 0x0000 +0+0.. <[^>]+> bf00[ ]+nople +0+0.. <[^>]+> bf00[ ]+nop #... diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d index 262973de494..e446b9ed8d3 100644 --- a/gas/testsuite/gas/arm/thumb32.d +++ b/gas/testsuite/gas/arm/thumb32.d @@ -535,11 +535,11 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\] 0[0-9a-f]+ <[^>]+> e9d5 230c ldrd r2, r3, \[r5, #48\].* 0[0-9a-f]+ <[^>]+> e955 230c ldrd r2, r3, \[r5, #-48\].* -0[0-9a-f]+ <[^>]+> e95f 4505 ldrd r4, r5, \[pc, #-16\] ; 0+5f0 <^>]+> +0[0-9a-f]+ <[^>]+> e95f 4504 ldrd r4, r5, \[pc, #-16\] ; 000005f0 0[0-9a-f]+ <[^>]+> e9c5 2300 strd r2, r3, \[r5\] 0[0-9a-f]+ <[^>]+> e9c5 230c strd r2, r3, \[r5, #48\].* 0[0-9a-f]+ <[^>]+> e945 230c strd r2, r3, \[r5, #-48\].* -0[0-9a-f]+ <[^>]+> e94f 2308 strd r2, r3, \[pc, #-32\] ; 0+5f0 <^>]+> +0[0-9a-f]+ <[^>]+> e94f 2308 strd r2, r3, \[pc, #-32\] ; 0+5f0 0[0-9a-f]+ <[^>]+> f815 1e00 ldrbt r1, \[r5\] 0[0-9a-f]+ <[^>]+> f815 1e30 ldrbt r1, \[r5, #48\].* 0[0-9a-f]+ <[^>]+> f915 1e00 ldrsbt r1, \[r5\] @@ -1065,3 +1065,4 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> fa62 f103 ror.w r1, r2, r3 0[0-9a-f]+ <[^>]+> fa61 f103 ror.w r1, r1, r3 0[0-9a-f]+ <[^>]+> bf00 nop +0[0-9a-f]+ <[^>]+> bf00 nop diff --git a/gas/testsuite/gas/arm/vldm-arm.d b/gas/testsuite/gas/arm/vldm-arm.d index b5f3202a13b..37fcb633651 100644 --- a/gas/testsuite/gas/arm/vldm-arm.d +++ b/gas/testsuite/gas/arm/vldm-arm.d @@ -2,6 +2,8 @@ # as: -mfpu=vfp3 # source: vldm.s # objdump: -dr --prefix-addresses --show-raw-insn +# This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* .*: +file format .*arm.* diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 537a0601d60..e148e8dd421 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2011-04-18 Julian Brown + + * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask. + 2011-04-11 Dan McDonald PR gas/12296 diff --git a/include/opcode/arm.h b/include/opcode/arm.h index c6fb22014c6..297ca63730b 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -109,8 +109,7 @@ #define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K) #define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_SEC) #define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC) -#define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER \ - | ARM_EXT_OS) +#define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER) #define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A) #define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV) #define ARM_AEXT_NOTM \ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ad8570622c0..d8d581973a0 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2011-04-18 Nick Clifton + + * arm-dis.c (psr_name): Revert previous delta. + 2011-04-13 Nick Clifton * v850-dis.c (disassemble): Always print a closing square brace if diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index c8b090beb8a..7264ef2cd43 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -3722,7 +3722,7 @@ psr_name (int regno) case 9: return "PSP"; case 16: return "PRIMASK"; case 17: return "BASEPRI"; - case 18: return "BASEPRI_MAX"; + case 18: return "BASEPRI_MASK"; case 19: return "FAULTMASK"; case 20: return "CONTROL"; default: return ""; @@ -4192,15 +4192,6 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) else func (stream, "(UNDEF: %lu)", sysm); } - else if ((given & 0xff) <= 3) - { - func (stream, "%s_", psr_name (given & 0xff)); - - if (given & 0x800) - func (stream, "nzcvq"); - if (given & 0x400) - func (stream, "g"); - } else { func (stream, psr_name (given & 0xff)); -- 2.30.2